1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun# Copyright 2020 Intel Corporation 3*4882a593Smuzhiyun%YAML 1.2 4*4882a593Smuzhiyun--- 5*4882a593Smuzhiyun$id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml# 6*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 7*4882a593Smuzhiyun 8*4882a593Smuzhiyuntitle: Intel KeemBay I2S Device Tree Bindings 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunmaintainers: 11*4882a593Smuzhiyun - Sia, Jee Heng <jee.heng.sia@intel.com> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundescription: | 14*4882a593Smuzhiyun Intel KeemBay I2S 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun enum: 19*4882a593Smuzhiyun - intel,keembay-i2s 20*4882a593Smuzhiyun - intel,keembay-tdm 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun "#sound-dai-cells": 23*4882a593Smuzhiyun const: 0 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun reg: 26*4882a593Smuzhiyun items: 27*4882a593Smuzhiyun - description: I2S registers 28*4882a593Smuzhiyun - description: I2S gen configuration 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun reg-names: 31*4882a593Smuzhiyun items: 32*4882a593Smuzhiyun - const: i2s-regs 33*4882a593Smuzhiyun - const: i2s_gen_cfg 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun interrupts: 36*4882a593Smuzhiyun maxItems: 1 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun clocks: 39*4882a593Smuzhiyun items: 40*4882a593Smuzhiyun - description: Bus Clock 41*4882a593Smuzhiyun - description: Module Clock 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun clock-names: 44*4882a593Smuzhiyun items: 45*4882a593Smuzhiyun - const: osc 46*4882a593Smuzhiyun - const: apb_clk 47*4882a593Smuzhiyun 48*4882a593Smuzhiyunrequired: 49*4882a593Smuzhiyun - compatible 50*4882a593Smuzhiyun - "#sound-dai-cells" 51*4882a593Smuzhiyun - reg 52*4882a593Smuzhiyun - clocks 53*4882a593Smuzhiyun - clock-names 54*4882a593Smuzhiyun - interrupts 55*4882a593Smuzhiyun 56*4882a593SmuzhiyunadditionalProperties: false 57*4882a593Smuzhiyun 58*4882a593Smuzhiyunexamples: 59*4882a593Smuzhiyun - | 60*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 61*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/irq.h> 62*4882a593Smuzhiyun #define KEEM_BAY_PSS_AUX_I2S3 63*4882a593Smuzhiyun #define KEEM_BAY_PSS_I2S3 64*4882a593Smuzhiyun i2s3: i2s@20140000 { 65*4882a593Smuzhiyun compatible = "intel,keembay-i2s"; 66*4882a593Smuzhiyun #sound-dai-cells = <0>; 67*4882a593Smuzhiyun reg = <0x20140000 0x200>, /* I2S registers */ 68*4882a593Smuzhiyun <0x202a00a4 0x4>; /* I2S gen configuration */ 69*4882a593Smuzhiyun reg-names = "i2s-regs", "i2s_gen_cfg"; 70*4882a593Smuzhiyun interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 71*4882a593Smuzhiyun clock-names = "osc", "apb_clk"; 72*4882a593Smuzhiyun clocks = <&scmi_clk KEEM_BAY_PSS_AUX_I2S3>, <&scmi_clk KEEM_BAY_PSS_I2S3>; 73*4882a593Smuzhiyun }; 74