1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/sound/ingenic,aic.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Ingenic SoCs AC97 / I2S Controller (AIC) DT bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Paul Cercueil <paul@crapouillou.net> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun $nodename: 14*4882a593Smuzhiyun pattern: '^audio-controller@' 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun oneOf: 18*4882a593Smuzhiyun - enum: 19*4882a593Smuzhiyun - ingenic,jz4740-i2s 20*4882a593Smuzhiyun - ingenic,jz4760-i2s 21*4882a593Smuzhiyun - ingenic,jz4770-i2s 22*4882a593Smuzhiyun - ingenic,jz4780-i2s 23*4882a593Smuzhiyun - items: 24*4882a593Smuzhiyun - const: ingenic,jz4725b-i2s 25*4882a593Smuzhiyun - const: ingenic,jz4740-i2s 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun '#sound-dai-cells': 28*4882a593Smuzhiyun const: 0 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun reg: 31*4882a593Smuzhiyun maxItems: 1 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun interrupts: 34*4882a593Smuzhiyun maxItems: 1 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun clocks: 37*4882a593Smuzhiyun items: 38*4882a593Smuzhiyun - description: AIC clock 39*4882a593Smuzhiyun - description: I2S clock 40*4882a593Smuzhiyun - description: EXT clock 41*4882a593Smuzhiyun - description: PLL/2 clock 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun clock-names: 44*4882a593Smuzhiyun items: 45*4882a593Smuzhiyun - const: aic 46*4882a593Smuzhiyun - const: i2s 47*4882a593Smuzhiyun - const: ext 48*4882a593Smuzhiyun - const: pll half 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun dmas: 51*4882a593Smuzhiyun items: 52*4882a593Smuzhiyun - description: DMA controller phandle and request line for I2S RX 53*4882a593Smuzhiyun - description: DMA controller phandle and request line for I2S TX 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun dma-names: 56*4882a593Smuzhiyun items: 57*4882a593Smuzhiyun - const: rx 58*4882a593Smuzhiyun - const: tx 59*4882a593Smuzhiyun 60*4882a593SmuzhiyunadditionalProperties: false 61*4882a593Smuzhiyun 62*4882a593Smuzhiyunrequired: 63*4882a593Smuzhiyun - compatible 64*4882a593Smuzhiyun - reg 65*4882a593Smuzhiyun - interrupts 66*4882a593Smuzhiyun - clocks 67*4882a593Smuzhiyun - clock-names 68*4882a593Smuzhiyun - dmas 69*4882a593Smuzhiyun - dma-names 70*4882a593Smuzhiyun - '#sound-dai-cells' 71*4882a593Smuzhiyun 72*4882a593Smuzhiyunexamples: 73*4882a593Smuzhiyun - | 74*4882a593Smuzhiyun #include <dt-bindings/clock/jz4740-cgu.h> 75*4882a593Smuzhiyun aic: audio-controller@10020000 { 76*4882a593Smuzhiyun compatible = "ingenic,jz4740-i2s"; 77*4882a593Smuzhiyun reg = <0x10020000 0x38>; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #sound-dai-cells = <0>; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun interrupt-parent = <&intc>; 82*4882a593Smuzhiyun interrupts = <18>; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun clocks = <&cgu JZ4740_CLK_AIC>, 85*4882a593Smuzhiyun <&cgu JZ4740_CLK_I2S>, 86*4882a593Smuzhiyun <&cgu JZ4740_CLK_EXT>, 87*4882a593Smuzhiyun <&cgu JZ4740_CLK_PLL_HALF>; 88*4882a593Smuzhiyun clock-names = "aic", "i2s", "ext", "pll half"; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>; 91*4882a593Smuzhiyun dma-names = "rx", "tx"; 92*4882a593Smuzhiyun }; 93