1*4882a593SmuzhiyunImagination Technologies I2S Input Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired Properties: 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun - compatible : Compatible list, must contain "img,i2s-in" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun - #sound-dai-cells : Must be equal to 0 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun - reg : Offset and length of the register set for the device 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun - clocks : Contains an entry for each entry in clock-names 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun - clock-names : Must include the following entry: 14*4882a593Smuzhiyun "sys" The system clock 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun - dmas: Contains an entry for each entry in dma-names. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun - dma-names: Must include the following entry: 19*4882a593Smuzhiyun "rx" Single DMA channel used by all active I2S channels 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun - img,i2s-channels : Number of I2S channels instantiated in the I2S in block 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunOptional Properties: 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun - interrupts : Contains the I2S in interrupts. Depending on 26*4882a593Smuzhiyun the configuration, there may be no interrupts, one interrupt, 27*4882a593Smuzhiyun or an interrupt per I2S channel. For the case where there is 28*4882a593Smuzhiyun one interrupt per channel, the interrupts should be listed 29*4882a593Smuzhiyun in ascending channel order 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun - resets: Contains a phandle to the I2S in reset signal 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun - reset-names: Contains the reset signal name "rst" 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunExample: 36*4882a593Smuzhiyun 37*4882a593Smuzhiyuni2s_in: i2s-in@18100800 { 38*4882a593Smuzhiyun compatible = "img,i2s-in"; 39*4882a593Smuzhiyun reg = <0x18100800 0x200>; 40*4882a593Smuzhiyun interrupts = <GIC_SHARED 7 IRQ_TYPE_LEVEL_HIGH>; 41*4882a593Smuzhiyun dmas = <&mdc 30 0xffffffff 0>; 42*4882a593Smuzhiyun dma-names = "rx"; 43*4882a593Smuzhiyun clocks = <&cr_periph SYS_CLK_I2S_IN>; 44*4882a593Smuzhiyun clock-names = "sys"; 45*4882a593Smuzhiyun img,i2s-channels = <6>; 46*4882a593Smuzhiyun #sound-dai-cells = <0>; 47*4882a593Smuzhiyun}; 48