1*4882a593SmuzhiyunDialog Semiconductor DA7212/DA7213 Audio Codec bindings 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun====== 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun- compatible : Should be "dlg,da7212" or "dlg,da7213" 7*4882a593Smuzhiyun- reg: Specifies the I2C slave address 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunOptional properties: 10*4882a593Smuzhiyun- clocks : phandle and clock specifier for codec MCLK. 11*4882a593Smuzhiyun- clock-names : Clock name string for 'clocks' attribute, should be "mclk". 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun- dlg,micbias1-lvl : Voltage (mV) for Mic Bias 1 14*4882a593Smuzhiyun [<1600>, <2200>, <2500>, <3000>] 15*4882a593Smuzhiyun- dlg,micbias2-lvl : Voltage (mV) for Mic Bias 2 16*4882a593Smuzhiyun [<1600>, <2200>, <2500>, <3000>] 17*4882a593Smuzhiyun- dlg,dmic-data-sel : DMIC channel select based on clock edge. 18*4882a593Smuzhiyun ["lrise_rfall", "lfall_rrise"] 19*4882a593Smuzhiyun- dlg,dmic-samplephase : When to sample audio from DMIC. 20*4882a593Smuzhiyun ["on_clkedge", "between_clkedge"] 21*4882a593Smuzhiyun- dlg,dmic-clkrate : DMIC clock frequency (Hz). 22*4882a593Smuzhiyun [<1500000>, <3000000>] 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun - VDDA-supply : Regulator phandle for Analogue power supply 25*4882a593Smuzhiyun - VDDMIC-supply : Regulator phandle for Mic Bias 26*4882a593Smuzhiyun - VDDIO-supply : Regulator phandle for I/O power supply 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun====== 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunExample: 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun codec_i2c: da7213@1a { 33*4882a593Smuzhiyun compatible = "dlg,da7213"; 34*4882a593Smuzhiyun reg = <0x1a>; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun clocks = <&clks 201>; 37*4882a593Smuzhiyun clock-names = "mclk"; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun dlg,micbias1-lvl = <2500>; 40*4882a593Smuzhiyun dlg,micbias2-lvl = <2500>; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun dlg,dmic-data-sel = "lrise_rfall"; 43*4882a593Smuzhiyun dlg,dmic-samplephase = "between_clkedge"; 44*4882a593Smuzhiyun dlg,dmic-clkrate = <3000000>; 45*4882a593Smuzhiyun }; 46