xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/cs42l56.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunCS42L52 audio CODEC
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun  - compatible : "cirrus,cs42l56"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun  - reg : the I2C address of the device for I2C
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun  - VA-supply, VCP-supply, VLDO-supply : power supplies for the device,
10*4882a593Smuzhiyun  as covered in Documentation/devicetree/bindings/regulator/regulator.txt.
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunOptional properties:
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun  - cirrus,gpio-nreset : GPIO controller's phandle and the number
15*4882a593Smuzhiyun  of the GPIO used to reset the codec.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun  - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
18*4882a593Smuzhiyun  Allowable values of 0x00 through 0x0F. These are raw values written to the
19*4882a593Smuzhiyun  register, not the actual frequency. The frequency is determined by the following.
20*4882a593Smuzhiyun  Frequency = MCLK / 4 * (N+2)
21*4882a593Smuzhiyun  N = chgfreq_val
22*4882a593Smuzhiyun  MCLK = Where MCLK is the frequency of the mclk signal after the MCLKDIV2 circuit.
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun  - cirrus,ain1a-ref-cfg, ain1b-ref-cfg : boolean, If present, AIN1A or AIN1B are configured
25*4882a593Smuzhiyun  as a pseudo-differential input referenced to AIN1REF/AIN3A.
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun  - cirrus,ain2a-ref-cfg, ain2b-ref-cfg : boolean, If present, AIN2A or AIN2B are configured
28*4882a593Smuzhiyun  as a pseudo-differential input referenced to AIN2REF/AIN3B.
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun  - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin.
31*4882a593Smuzhiyun  0 = 0.5 x VA
32*4882a593Smuzhiyun  1 = 0.6 x VA
33*4882a593Smuzhiyun  2 = 0.7 x VA
34*4882a593Smuzhiyun  3 = 0.8 x VA
35*4882a593Smuzhiyun  4 = 0.83 x VA
36*4882a593Smuzhiyun  5 = 0.91 x VA
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun  - cirrus,adaptive-pwr-cfg : Configures how the power to the Headphone and Lineout
39*4882a593Smuzhiyun  Amplifiers adapt to the output signal levels.
40*4882a593Smuzhiyun  0 = Adapt to Volume Mode. Voltage level determined by the sum of the relevant volume settings.
41*4882a593Smuzhiyun  1 = Fixed - Headphone and Line Amp supply = + or - VCP/2.
42*4882a593Smuzhiyun  2 = Fixed - Headphone and Line Amp supply = + or - VCP.
43*4882a593Smuzhiyun  3 = Adapted to Signal; Voltage level is dynamically determined by the output signal.
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun  - cirrus,hpf-left-freq, hpf-right-freq : Sets the corner frequency (-3dB point) for the internal High-Pass
46*4882a593Smuzhiyun  Filter.
47*4882a593Smuzhiyun  0 = 1.8Hz
48*4882a593Smuzhiyun  1 = 119Hz
49*4882a593Smuzhiyun  2 = 236Hz
50*4882a593Smuzhiyun  3 = 464Hz
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun
53*4882a593SmuzhiyunExample:
54*4882a593Smuzhiyun
55*4882a593Smuzhiyuncodec: codec@4b {
56*4882a593Smuzhiyun	compatible = "cirrus,cs42l56";
57*4882a593Smuzhiyun	reg = <0x4b>;
58*4882a593Smuzhiyun	cirrus,gpio-nreset = <&gpio 10 0>;
59*4882a593Smuzhiyun	cirrus,chgfreq-divisor = <0x05>;
60*4882a593Smuzhiyun	cirrus.ain1_ref_cfg;
61*4882a593Smuzhiyun	cirrus,micbias-lvl = <5>;
62*4882a593Smuzhiyun	VA-supply = <&reg_audio>;
63*4882a593Smuzhiyun};
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