1*4882a593SmuzhiyunCS4265 audio CODEC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis device supports I2C only. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun - compatible : "cirrus,cs4265" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun - reg : the I2C address of the device for I2C. The I2C address depends on 10*4882a593Smuzhiyun the state of the AD0 pin. If AD0 is high, the i2c address is 0x4f. 11*4882a593Smuzhiyun If it is low, the i2c address is 0x4e. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunOptional properties: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun - reset-gpios : a GPIO spec for the reset pin. If specified, it will be 16*4882a593Smuzhiyun deasserted before communication to the codec starts. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunExamples: 19*4882a593Smuzhiyun 20*4882a593Smuzhiyuncodec_ad0_high: cs4265@4f { /* AD0 Pin is high */ 21*4882a593Smuzhiyun compatible = "cirrus,cs4265"; 22*4882a593Smuzhiyun reg = <0x4f>; 23*4882a593Smuzhiyun}; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun 26*4882a593Smuzhiyuncodec_ad0_low: cs4265@4e { /* AD0 Pin is low */ 27*4882a593Smuzhiyun compatible = "cirrus,cs4265"; 28*4882a593Smuzhiyun reg = <0x4e>; 29*4882a593Smuzhiyun}; 30