1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/sound/cirrus,madera.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Cirrus Logic Madera class audio CODECs 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - patches@opensource.cirrus.com 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun This describes audio configuration bindings for these codecs. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun See also the core bindings for the parent MFD driver: 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun Documentation/devicetree/bindings/mfd/cirrus,madera.yaml 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun and defines for values used in these bindings: 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun include/dt-bindings/sound/madera.h 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun The properties are all contained in the parent MFD node. 24*4882a593Smuzhiyun 25*4882a593Smuzhiyunproperties: 26*4882a593Smuzhiyun '#sound-dai-cells': 27*4882a593Smuzhiyun description: 28*4882a593Smuzhiyun The first cell indicating the audio interface. 29*4882a593Smuzhiyun const: 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun cirrus,inmode: 32*4882a593Smuzhiyun description: 33*4882a593Smuzhiyun A list of input mode settings for each input. A maximum 34*4882a593Smuzhiyun of 24 cells, with four cells per input in the order INnAL, 35*4882a593Smuzhiyun INnAR INnBL INnBR. For non-muxed inputs the first two cells 36*4882a593Smuzhiyun for that input set the mode for the left and right channel 37*4882a593Smuzhiyun and the second two cells must be 0. For muxed inputs the 38*4882a593Smuzhiyun first two cells for that input set the mode of the left and 39*4882a593Smuzhiyun right A inputs and the second two cells set the mode of the 40*4882a593Smuzhiyun left and right B inputs. Valid mode values are one of the 41*4882a593Smuzhiyun MADERA_INMODE_xxx. If the array is shorter than the number 42*4882a593Smuzhiyun of inputs the unspecified inputs default to MADERA_INMODE_DIFF. 43*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32-array 44*4882a593Smuzhiyun minItems: 1 45*4882a593Smuzhiyun maxItems: 24 46*4882a593Smuzhiyun items: 47*4882a593Smuzhiyun minimum: 0 48*4882a593Smuzhiyun maximum: 1 49*4882a593Smuzhiyun default: 0 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun cirrus,out-mono: 52*4882a593Smuzhiyun description: 53*4882a593Smuzhiyun Mono bit for each output, maximum of six cells if the array 54*4882a593Smuzhiyun is shorter outputs will be set to stereo. 55*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32-array 56*4882a593Smuzhiyun minItems: 1 57*4882a593Smuzhiyun maxItems: 6 58*4882a593Smuzhiyun items: 59*4882a593Smuzhiyun minimum: 0 60*4882a593Smuzhiyun maximum: 1 61*4882a593Smuzhiyun default: 0 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun cirrus,dmic-ref: 64*4882a593Smuzhiyun description: | 65*4882a593Smuzhiyun Indicates how the MICBIAS pins have been externally connected 66*4882a593Smuzhiyun to DMICs on each input, one cell per input. 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun <IN1 IN2 IN3 ...> 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun A value of 0 indicates MICVDD and is the default, 71*4882a593Smuzhiyun other values depend on the codec: For CS47L35 one of the 72*4882a593Smuzhiyun CS47L35_DMIC_REF_xxx values For all other codecs one of 73*4882a593Smuzhiyun the MADERA_DMIC_REF_xxx values Also see the datasheet for a 74*4882a593Smuzhiyun description of the INn_DMIC_SUP field. 75*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32-array 76*4882a593Smuzhiyun minItems: 1 77*4882a593Smuzhiyun maxItems: 6 78*4882a593Smuzhiyun items: 79*4882a593Smuzhiyun minimum: 0 80*4882a593Smuzhiyun maximum: 3 81*4882a593Smuzhiyun default: 0 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun cirrus,max-channels-clocked: 84*4882a593Smuzhiyun description: 85*4882a593Smuzhiyun Maximum number of channels that I2S clocks will be generated 86*4882a593Smuzhiyun for. Useful when clock master for systems where the I2S bus 87*4882a593Smuzhiyun has multiple data lines. One cell for each AIF, use a value 88*4882a593Smuzhiyun of zero for AIFs that should be handled normally. 89*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32-array 90*4882a593Smuzhiyun minItems: 1 91*4882a593Smuzhiyun maxItems: 4 92*4882a593Smuzhiyun items: 93*4882a593Smuzhiyun default: 0 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun cirrus,pdm-fmt: 96*4882a593Smuzhiyun description: 97*4882a593Smuzhiyun PDM speaker data format, must contain 2 cells (OUT5 and 98*4882a593Smuzhiyun OUT6). See the PDM_SPKn_FMT field in the datasheet for a 99*4882a593Smuzhiyun description of this value. The second cell is ignored for 100*4882a593Smuzhiyun codecs that do not have OUT6. 101*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32-array 102*4882a593Smuzhiyun minItems: 2 103*4882a593Smuzhiyun maxItems: 2 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun cirrus,pdm-mute: 106*4882a593Smuzhiyun description: | 107*4882a593Smuzhiyun PDM mute format, must contain 2 cells (OUT5 and OUT6). See the 108*4882a593Smuzhiyun PDM_SPKn_CTRL_1 register in the datasheet for a description 109*4882a593Smuzhiyun of this value. The second cell is ignored for codecs that 110*4882a593Smuzhiyun do not have OUT6. 111*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32-array 112*4882a593Smuzhiyun minItems: 2 113*4882a593Smuzhiyun maxItems: 2 114*4882a593Smuzhiyun 115*4882a593SmuzhiyunadditionalProperties: true 116