1*4882a593SmuzhiyunGeneric AC97 Device Properties 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis documents describes the devicetree bindings for an ac97 controller child 4*4882a593Smuzhiyunnode describing ac97 codecs. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun-compatible : Must be "ac97,vendor_id1,vendor_id2 8*4882a593Smuzhiyun The ids shall be the 4 characters hexadecimal encoding, such as 9*4882a593Smuzhiyun given by "%04x" formatting of printf 10*4882a593Smuzhiyun-reg : Must be the ac97 codec number, between 0 and 3 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunExample: 13*4882a593Smuzhiyunac97: sound@40500000 { 14*4882a593Smuzhiyun compatible = "marvell,pxa270-ac97"; 15*4882a593Smuzhiyun reg = < 0x40500000 0x1000 >; 16*4882a593Smuzhiyun interrupts = <14>; 17*4882a593Smuzhiyun reset-gpios = <&gpio 95 GPIO_ACTIVE_HIGH>; 18*4882a593Smuzhiyun #sound-dai-cells = <1>; 19*4882a593Smuzhiyun pinctrl-names = "default"; 20*4882a593Smuzhiyun pinctrl-0 = < &pinctrl_ac97_default >; 21*4882a593Smuzhiyun clocks = <&clks CLK_AC97>, <&clks CLK_AC97CONF>; 22*4882a593Smuzhiyun clock-names = "AC97CLK", "AC97CONFCLK"; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #address-cells = <1>; 25*4882a593Smuzhiyun #size-cells = <0>; 26*4882a593Smuzhiyun audio-codec@0 { 27*4882a593Smuzhiyun reg = <0>; 28*4882a593Smuzhiyun compatible = "ac97,574d,4c13"; 29*4882a593Smuzhiyun clocks = <&fixed_wm9713_clock>; 30*4882a593Smuzhiyun clock-names = "ac97_clk"; 31*4882a593Smuzhiyun } 32*4882a593Smuzhiyun}; 33