1*4882a593SmuzhiyunQCOM GSBI (General Serial Bus Interface) Driver 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe GSBI controller is modeled as a node with zero or more child nodes, each 4*4882a593Smuzhiyunrepresenting a serial sub-node device that is mux'd as part of the GSBI 5*4882a593Smuzhiyunconfiguration settings. The mode setting will govern the input/output mode of 6*4882a593Smuzhiyunthe 4 GSBI IOs. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun- compatible: Should contain "qcom,gsbi-v1.0.0" 10*4882a593Smuzhiyun- cell-index: Should contain the GSBI index 11*4882a593Smuzhiyun- reg: Address range for GSBI registers 12*4882a593Smuzhiyun- clocks: required clock 13*4882a593Smuzhiyun- clock-names: must contain "iface" entry 14*4882a593Smuzhiyun- qcom,mode : indicates MUX value for configuration of the serial interface. 15*4882a593Smuzhiyun Please reference dt-bindings/soc/qcom,gsbi.h for valid mux values. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunOptional properties: 18*4882a593Smuzhiyun- qcom,crci : indicates CRCI MUX value for QUP CRCI ports. Please reference 19*4882a593Smuzhiyun dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values. 20*4882a593Smuzhiyun- syscon-tcsr: indicates phandle of TCSR syscon node. Required if child uses 21*4882a593Smuzhiyun dma. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunRequired properties if child node exists: 24*4882a593Smuzhiyun- #address-cells: Must be 1 25*4882a593Smuzhiyun- #size-cells: Must be 1 26*4882a593Smuzhiyun- ranges: Must be present 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunProperties for children: 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunA GSBI controller node can contain 0 or more child nodes representing serial 31*4882a593Smuzhiyundevices. These serial devices can be a QCOM UART, I2C controller, spi 32*4882a593Smuzhiyuncontroller, or some combination of aforementioned devices. 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunSee the following for child node definitions: 35*4882a593SmuzhiyunDocumentation/devicetree/bindings/i2c/qcom,i2c-qup.txt 36*4882a593SmuzhiyunDocumentation/devicetree/bindings/spi/qcom,spi-qup.txt 37*4882a593SmuzhiyunDocumentation/devicetree/bindings/serial/qcom,msm-uartdm.txt 38*4882a593Smuzhiyun 39*4882a593SmuzhiyunExample for APQ8064: 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun#include <dt-bindings/soc/qcom,gsbi.h> 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun gsbi4@16300000 { 44*4882a593Smuzhiyun compatible = "qcom,gsbi-v1.0.0"; 45*4882a593Smuzhiyun cell-index = <4>; 46*4882a593Smuzhiyun reg = <0x16300000 0x100>; 47*4882a593Smuzhiyun clocks = <&gcc GSBI4_H_CLK>; 48*4882a593Smuzhiyun clock-names = "iface"; 49*4882a593Smuzhiyun #address-cells = <1>; 50*4882a593Smuzhiyun #size-cells = <1>; 51*4882a593Smuzhiyun ranges; 52*4882a593Smuzhiyun qcom,mode = <GSBI_PROT_I2C_UART>; 53*4882a593Smuzhiyun qcom,crci = <GSBI_CRCI_QUP>; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun syscon-tcsr = <&tcsr>; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* child nodes go under here */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun i2c_qup4: i2c@16380000 { 60*4882a593Smuzhiyun compatible = "qcom,i2c-qup-v1.1.1"; 61*4882a593Smuzhiyun reg = <0x16380000 0x1000>; 62*4882a593Smuzhiyun interrupts = <0 153 0>; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun clocks = <&gcc GSBI4_QUP_CLK>, <&gcc GSBI4_H_CLK>; 65*4882a593Smuzhiyun clock-names = "core", "iface"; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun clock-frequency = <200000>; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #address-cells = <1>; 70*4882a593Smuzhiyun #size-cells = <0>; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun uart4: serial@16340000 { 75*4882a593Smuzhiyun compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; 76*4882a593Smuzhiyun reg = <0x16340000 0x1000>, 77*4882a593Smuzhiyun <0x16300000 0x1000>; 78*4882a593Smuzhiyun interrupts = <0 152 0x0>; 79*4882a593Smuzhiyun clocks = <&gcc GSBI4_UART_CLK>, <&gcc GSBI4_H_CLK>; 80*4882a593Smuzhiyun clock-names = "core", "iface"; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun tcsr: syscon@1a400000 { 85*4882a593Smuzhiyun compatible = "qcom,apq8064-tcsr", "syscon"; 86*4882a593Smuzhiyun reg = <0x1a400000 0x100>; 87*4882a593Smuzhiyun }; 88