xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#"
5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Atmel Timer Counter Block
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Alexandre Belloni <alexandre.belloni@bootlin.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyundescription: |
13*4882a593Smuzhiyun  The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
14*4882a593Smuzhiyun  timer has three channels with two counters each.
15*4882a593Smuzhiyun
16*4882a593Smuzhiyunproperties:
17*4882a593Smuzhiyun  compatible:
18*4882a593Smuzhiyun    items:
19*4882a593Smuzhiyun      - enum:
20*4882a593Smuzhiyun          - atmel,at91rm9200-tcb
21*4882a593Smuzhiyun          - atmel,at91sam9x5-tcb
22*4882a593Smuzhiyun          - atmel,sama5d2-tcb
23*4882a593Smuzhiyun      - const: simple-mfd
24*4882a593Smuzhiyun      - const: syscon
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun  reg:
27*4882a593Smuzhiyun    maxItems: 1
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun  interrupts:
30*4882a593Smuzhiyun    description:
31*4882a593Smuzhiyun      List of interrupts. One interrupt per TCB channel if available or one
32*4882a593Smuzhiyun      interrupt for the TC block
33*4882a593Smuzhiyun    minItems: 1
34*4882a593Smuzhiyun    maxItems: 3
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun  clock-names:
37*4882a593Smuzhiyun    description:
38*4882a593Smuzhiyun      List of clock names. Always includes t0_clk and slow clk. Also includes
39*4882a593Smuzhiyun      t1_clk and t2_clk if a clock per channel is available.
40*4882a593Smuzhiyun    minItems: 2
41*4882a593Smuzhiyun    maxItems: 4
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun  clocks:
44*4882a593Smuzhiyun    minItems: 2
45*4882a593Smuzhiyun    maxItems: 4
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun  '#address-cells':
48*4882a593Smuzhiyun    const: 1
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun  '#size-cells':
51*4882a593Smuzhiyun    const: 0
52*4882a593Smuzhiyun
53*4882a593SmuzhiyunpatternProperties:
54*4882a593Smuzhiyun  "^timer@[0-2]$":
55*4882a593Smuzhiyun    description: The timer block channels that are used as timers or counters.
56*4882a593Smuzhiyun    type: object
57*4882a593Smuzhiyun    properties:
58*4882a593Smuzhiyun      compatible:
59*4882a593Smuzhiyun        items:
60*4882a593Smuzhiyun          - enum:
61*4882a593Smuzhiyun              - atmel,tcb-timer
62*4882a593Smuzhiyun              - microchip,tcb-capture
63*4882a593Smuzhiyun      reg:
64*4882a593Smuzhiyun        description:
65*4882a593Smuzhiyun          List of channels to use for this particular timer. In Microchip TCB capture
66*4882a593Smuzhiyun          mode channels are registered as a counter devices, for the qdec mode TCB0's
67*4882a593Smuzhiyun          channel <0> and <1> are required.
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun        minItems: 1
70*4882a593Smuzhiyun        maxItems: 3
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun    required:
73*4882a593Smuzhiyun      - compatible
74*4882a593Smuzhiyun      - reg
75*4882a593Smuzhiyun
76*4882a593SmuzhiyunallOf:
77*4882a593Smuzhiyun  - if:
78*4882a593Smuzhiyun      properties:
79*4882a593Smuzhiyun        compatible:
80*4882a593Smuzhiyun          contains:
81*4882a593Smuzhiyun            const: atmel,sama5d2-tcb
82*4882a593Smuzhiyun    then:
83*4882a593Smuzhiyun      properties:
84*4882a593Smuzhiyun        clocks:
85*4882a593Smuzhiyun          minItems: 3
86*4882a593Smuzhiyun          maxItems: 3
87*4882a593Smuzhiyun        clock-names:
88*4882a593Smuzhiyun          items:
89*4882a593Smuzhiyun            - const: t0_clk
90*4882a593Smuzhiyun            - const: gclk
91*4882a593Smuzhiyun            - const: slow_clk
92*4882a593Smuzhiyun    else:
93*4882a593Smuzhiyun      properties:
94*4882a593Smuzhiyun        clocks:
95*4882a593Smuzhiyun          minItems: 2
96*4882a593Smuzhiyun          maxItems: 4
97*4882a593Smuzhiyun        clock-names:
98*4882a593Smuzhiyun          oneOf:
99*4882a593Smuzhiyun            - items:
100*4882a593Smuzhiyun                - const: t0_clk
101*4882a593Smuzhiyun                - const: slow_clk
102*4882a593Smuzhiyun            - items:
103*4882a593Smuzhiyun                - const: t0_clk
104*4882a593Smuzhiyun                - const: t1_clk
105*4882a593Smuzhiyun                - const: t2_clk
106*4882a593Smuzhiyun                - const: slow_clk
107*4882a593Smuzhiyun
108*4882a593Smuzhiyunrequired:
109*4882a593Smuzhiyun  - compatible
110*4882a593Smuzhiyun  - reg
111*4882a593Smuzhiyun  - interrupts
112*4882a593Smuzhiyun  - clocks
113*4882a593Smuzhiyun  - clock-names
114*4882a593Smuzhiyun  - '#address-cells'
115*4882a593Smuzhiyun  - '#size-cells'
116*4882a593Smuzhiyun
117*4882a593SmuzhiyunadditionalProperties: false
118*4882a593Smuzhiyun
119*4882a593Smuzhiyunexamples:
120*4882a593Smuzhiyun  - |
121*4882a593Smuzhiyun    /* One interrupt per TC block: */
122*4882a593Smuzhiyun        tcb0: timer@fff7c000 {
123*4882a593Smuzhiyun                compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
124*4882a593Smuzhiyun                #address-cells = <1>;
125*4882a593Smuzhiyun                #size-cells = <0>;
126*4882a593Smuzhiyun                reg = <0xfff7c000 0x100>;
127*4882a593Smuzhiyun                interrupts = <18 4>;
128*4882a593Smuzhiyun                clocks = <&tcb0_clk>, <&clk32k>;
129*4882a593Smuzhiyun                clock-names = "t0_clk", "slow_clk";
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun                timer@0 {
132*4882a593Smuzhiyun                        compatible = "atmel,tcb-timer";
133*4882a593Smuzhiyun                        reg = <0>, <1>;
134*4882a593Smuzhiyun                };
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun                timer@2 {
137*4882a593Smuzhiyun                        compatible = "atmel,tcb-timer";
138*4882a593Smuzhiyun                        reg = <2>;
139*4882a593Smuzhiyun                };
140*4882a593Smuzhiyun        };
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun    /* One interrupt per TC channel in a TC block: */
143*4882a593Smuzhiyun        tcb1: timer@fffdc000 {
144*4882a593Smuzhiyun                compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
145*4882a593Smuzhiyun                #address-cells = <1>;
146*4882a593Smuzhiyun                #size-cells = <0>;
147*4882a593Smuzhiyun                reg = <0xfffdc000 0x100>;
148*4882a593Smuzhiyun                interrupts = <26 4>, <27 4>, <28 4>;
149*4882a593Smuzhiyun                clocks = <&tcb1_clk>, <&clk32k>;
150*4882a593Smuzhiyun                clock-names = "t0_clk", "slow_clk";
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun                timer@0 {
153*4882a593Smuzhiyun                        compatible = "atmel,tcb-timer";
154*4882a593Smuzhiyun                        reg = <0>;
155*4882a593Smuzhiyun                };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun                timer@1 {
158*4882a593Smuzhiyun                        compatible = "atmel,tcb-timer";
159*4882a593Smuzhiyun                        reg = <1>;
160*4882a593Smuzhiyun                };
161*4882a593Smuzhiyun        };
162*4882a593Smuzhiyun    /* TCB0 Capture with QDEC: */
163*4882a593Smuzhiyun        timer@f800c000 {
164*4882a593Smuzhiyun                compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
165*4882a593Smuzhiyun                #address-cells = <1>;
166*4882a593Smuzhiyun                #size-cells = <0>;
167*4882a593Smuzhiyun                reg = <0xfff7c000 0x100>;
168*4882a593Smuzhiyun                interrupts = <18 4>;
169*4882a593Smuzhiyun                clocks = <&tcb0_clk>, <&clk32k>;
170*4882a593Smuzhiyun                clock-names = "t0_clk", "slow_clk";
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun                timer@0 {
173*4882a593Smuzhiyun                        compatible = "microchip,tcb-capture";
174*4882a593Smuzhiyun                        reg = <0>, <1>;
175*4882a593Smuzhiyun                };
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun                timer@2 {
178*4882a593Smuzhiyun                        compatible = "atmel,tcb-timer";
179*4882a593Smuzhiyun                        reg = <2>;
180*4882a593Smuzhiyun                };
181*4882a593Smuzhiyun        };
182