1*4882a593Smuzhiyun* Global Utilities Block 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe global utilities block controls power management, I/O device 4*4882a593Smuzhiyunenabling, power-on-reset configuration monitoring, general-purpose 5*4882a593SmuzhiyunI/O signal configuration, alternate function selection for multiplexed 6*4882a593Smuzhiyunsignals, and clock control. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun - compatible : Should define the compatible device type for 11*4882a593Smuzhiyun global-utilities. 12*4882a593Smuzhiyun Possible compatibles: 13*4882a593Smuzhiyun "fsl,qoriq-device-config-1.0" 14*4882a593Smuzhiyun "fsl,qoriq-device-config-2.0" 15*4882a593Smuzhiyun "fsl,<chip>-device-config" 16*4882a593Smuzhiyun "fsl,<chip>-guts" 17*4882a593Smuzhiyun - reg : Offset and length of the register set for the device. 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunRecommended properties: 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun - fsl,has-rstcr : Indicates that the global utilities register set 22*4882a593Smuzhiyun contains a functioning "reset control register" (i.e. the board 23*4882a593Smuzhiyun is wired to reset upon setting the HRESET_REQ bit in this register). 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun - fsl,liodn-bits : Indicates the number of defined bits in the LIODN 26*4882a593Smuzhiyun registers, for those SOCs that have a PAMU device. 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun - little-endian : Indicates that the global utilities block is little 29*4882a593Smuzhiyun endian. The default is big endian. 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunExamples: 32*4882a593Smuzhiyun global-utilities@e0000 { /* global utilities block */ 33*4882a593Smuzhiyun compatible = "fsl,mpc8548-guts"; 34*4882a593Smuzhiyun reg = <e0000 1000>; 35*4882a593Smuzhiyun fsl,has-rstcr; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun guts: global-utilities@e0000 { 39*4882a593Smuzhiyun compatible = "fsl,qoriq-device-config-1.0"; 40*4882a593Smuzhiyun reg = <0xe0000 0xe00>; 41*4882a593Smuzhiyun fsl,has-rstcr; 42*4882a593Smuzhiyun #sleep-cells = <1>; 43*4882a593Smuzhiyun fsl,liodn-bits = <12>; 44*4882a593Smuzhiyun }; 45