1*4882a593SmuzhiyunQualcomm SLIMbus controller 2*4882a593SmuzhiyunThis controller is used if applications processor driver controls SLIMbus 3*4882a593Smuzhiyunmaster component. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun - #address-cells - refer to Documentation/devicetree/bindings/slimbus/bus.txt 8*4882a593Smuzhiyun - #size-cells - refer to Documentation/devicetree/bindings/slimbus/bus.txt 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun - reg : Offset and length of the register region(s) for the device 11*4882a593Smuzhiyun - reg-names : Register region name(s) referenced in reg above 12*4882a593Smuzhiyun Required register resource entries are: 13*4882a593Smuzhiyun "ctrl": Physical address of controller register blocks 14*4882a593Smuzhiyun "slew": required for "qcom,apq8064-slim" SOC. 15*4882a593Smuzhiyun - compatible : should be "qcom,<SOC-NAME>-slim" for SOC specific compatible 16*4882a593Smuzhiyun followed by "qcom,slim" for fallback. 17*4882a593Smuzhiyun - interrupts : Interrupt number used by this controller 18*4882a593Smuzhiyun - clocks : Interface and core clocks used by this SLIMbus controller 19*4882a593Smuzhiyun - clock-names : Required clock-name entries are: 20*4882a593Smuzhiyun "iface" : Interface clock for this controller 21*4882a593Smuzhiyun "core" : Interrupt for controller core's BAM 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunExample: 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun slim@28080000 { 26*4882a593Smuzhiyun compatible = "qcom,apq8064-slim", "qcom,slim"; 27*4882a593Smuzhiyun reg = <0x28080000 0x2000>, <0x80207C 4>; 28*4882a593Smuzhiyun reg-names = "ctrl", "slew"; 29*4882a593Smuzhiyun interrupts = <0 33 0>; 30*4882a593Smuzhiyun clocks = <&lcc SLIMBUS_SRC>, <&lcc AUDIO_SLIMBUS_CLK>; 31*4882a593Smuzhiyun clock-names = "iface", "core"; 32*4882a593Smuzhiyun #address-cells = <2>; 33*4882a593Smuzhiyun #size-cell = <0>; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun wcd9310: audio-codec@1,0{ 36*4882a593Smuzhiyun compatible = "slim217,60"; 37*4882a593Smuzhiyun reg = <1 0>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun }; 40