1*4882a593Smuzhiyun* Fiq debugger based on UART 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun- compatible: "rockchip,fiq-debugger" 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun Compatibility with all rk30xx rk31xx rk32xx rk33xx SOCs. 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun- rockchip,serial-id: The uart which is used as debug port, 8*4882a593Smuzhiyun start from 0,1,2,3... 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun- rockchip,signal-irq: A hardware interrupt without source, 11*4882a593Smuzhiyun which is triggered by FIQ handler to call functions that 12*4882a593Smuzhiyun must be called in IRQ context. Often it is configured by 13*4882a593Smuzhiyun soc developer. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun- rockchip,wake-irq: It is used to wake up fiq debugger, 16*4882a593Smuzhiyun but usually not used. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- rockchip,irq-mode-enable: If it is set 1, uart uses irq 19*4882a593Smuzhiyun instead of fiq. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun- rockchip,baudrate: Only 115200 and 1500000. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunExample: 24*4882a593Smuzhiyun fiq-debugger { 25*4882a593Smuzhiyun compatible = "rockchip,fiq-debugger"; 26*4882a593Smuzhiyun rockchip,serial-id = <2>; 27*4882a593Smuzhiyun rockchip,signal-irq = <186>; 28*4882a593Smuzhiyun rockchip,wake-irq = <0>; 29*4882a593Smuzhiyun rockchip,irq-mode-enable = <0>; 30*4882a593Smuzhiyun rockchip,baudrate = <115200>; 31*4882a593Smuzhiyun status = "disabled"; 32*4882a593Smuzhiyun }; 33