1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/serial/renesas,scifa.yaml#" 5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Renesas Serial Communications Interface with FIFO A (SCIFA) 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Geert Uytterhoeven <geert+renesas@glider.be> 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunallOf: 13*4882a593Smuzhiyun - $ref: serial.yaml# 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun oneOf: 18*4882a593Smuzhiyun - items: 19*4882a593Smuzhiyun - enum: 20*4882a593Smuzhiyun - renesas,scifa-r8a73a4 # R-Mobile APE6 21*4882a593Smuzhiyun - renesas,scifa-r8a7740 # R-Mobile A1 22*4882a593Smuzhiyun - renesas,scifa-sh73a0 # SH-Mobile AG5 23*4882a593Smuzhiyun - const: renesas,scifa # generic SCIFA compatible UART 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun - items: 26*4882a593Smuzhiyun - enum: 27*4882a593Smuzhiyun - renesas,scifa-r8a7742 # RZ/G1H 28*4882a593Smuzhiyun - renesas,scifa-r8a7743 # RZ/G1M 29*4882a593Smuzhiyun - renesas,scifa-r8a7744 # RZ/G1N 30*4882a593Smuzhiyun - renesas,scifa-r8a7745 # RZ/G1E 31*4882a593Smuzhiyun - renesas,scifa-r8a7790 # R-Car H2 32*4882a593Smuzhiyun - renesas,scifa-r8a7791 # R-Car M2-W 33*4882a593Smuzhiyun - renesas,scifa-r8a7793 # R-Car M2-N 34*4882a593Smuzhiyun - renesas,scifa-r8a7794 # R-Car E2 35*4882a593Smuzhiyun - const: renesas,rcar-gen2-scifa # R-Car Gen2 and RZ/G1 36*4882a593Smuzhiyun - const: renesas,scifa # generic SCIFA compatible UART 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun reg: 39*4882a593Smuzhiyun maxItems: 1 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun interrupts: 42*4882a593Smuzhiyun maxItems: 1 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun clocks: 45*4882a593Smuzhiyun maxItems: 1 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun clock-names: 48*4882a593Smuzhiyun enum: 49*4882a593Smuzhiyun - fck # UART functional clock 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun power-domains: 52*4882a593Smuzhiyun maxItems: 1 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun resets: 55*4882a593Smuzhiyun maxItems: 1 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun dmas: 58*4882a593Smuzhiyun description: 59*4882a593Smuzhiyun Must contain a list of pairs of references to DMA specifiers, one for 60*4882a593Smuzhiyun transmission, and one for reception. 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun dma-names: 63*4882a593Smuzhiyun minItems: 2 64*4882a593Smuzhiyun maxItems: 4 65*4882a593Smuzhiyun items: 66*4882a593Smuzhiyun enum: 67*4882a593Smuzhiyun - tx 68*4882a593Smuzhiyun - rx 69*4882a593Smuzhiyun 70*4882a593Smuzhiyunrequired: 71*4882a593Smuzhiyun - compatible 72*4882a593Smuzhiyun - reg 73*4882a593Smuzhiyun - interrupts 74*4882a593Smuzhiyun - clocks 75*4882a593Smuzhiyun - clock-names 76*4882a593Smuzhiyun - power-domains 77*4882a593Smuzhiyun 78*4882a593SmuzhiyununevaluatedProperties: false 79*4882a593Smuzhiyun 80*4882a593Smuzhiyunif: 81*4882a593Smuzhiyun properties: 82*4882a593Smuzhiyun compatible: 83*4882a593Smuzhiyun contains: 84*4882a593Smuzhiyun enum: 85*4882a593Smuzhiyun - renesas,rcar-gen2-scifa 86*4882a593Smuzhiyunthen: 87*4882a593Smuzhiyun required: 88*4882a593Smuzhiyun - resets 89*4882a593Smuzhiyun 90*4882a593Smuzhiyunexamples: 91*4882a593Smuzhiyun - | 92*4882a593Smuzhiyun #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 93*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 94*4882a593Smuzhiyun #include <dt-bindings/power/r8a7790-sysc.h> 95*4882a593Smuzhiyun aliases { 96*4882a593Smuzhiyun serial0 = &scifa0; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun scifa0: serial@e6c40000 { 100*4882a593Smuzhiyun compatible = "renesas,scifa-r8a7790", "renesas,rcar-gen2-scifa", 101*4882a593Smuzhiyun "renesas,scifa"; 102*4882a593Smuzhiyun reg = <0xe6c40000 64>; 103*4882a593Smuzhiyun interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 104*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 204>; 105*4882a593Smuzhiyun clock-names = "fck"; 106*4882a593Smuzhiyun power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 107*4882a593Smuzhiyun resets = <&cpg 204>; 108*4882a593Smuzhiyun dmas = <&dmac0 0x21>, <&dmac0 0x22>, <&dmac1 0x21>, <&dmac1 0x22>; 109*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 110*4882a593Smuzhiyun }; 111