1*4882a593Smuzhiyun* MSM Serial UART 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe MSM serial UART hardware is designed for low-speed use cases where a 4*4882a593Smuzhiyundma-engine isn't needed. From a software perspective it's mostly compatible 5*4882a593Smuzhiyunwith the MSM serial UARTDM except that it only supports reading and writing one 6*4882a593Smuzhiyuncharacter at a time. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun- compatible: Should contain "qcom,msm-uart" 10*4882a593Smuzhiyun- reg: Should contain UART register location and length. 11*4882a593Smuzhiyun- interrupts: Should contain UART interrupt. 12*4882a593Smuzhiyun- clocks: Should contain the core clock. 13*4882a593Smuzhiyun- clock-names: Should be "core". 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunExample: 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunA uart device at 0xa9c00000 with interrupt 11. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunserial@a9c00000 { 20*4882a593Smuzhiyun compatible = "qcom,msm-uart"; 21*4882a593Smuzhiyun reg = <0xa9c00000 0x1000>; 22*4882a593Smuzhiyun interrupts = <11>; 23*4882a593Smuzhiyun clocks = <&uart_cxc>; 24*4882a593Smuzhiyun clock-names = "core"; 25*4882a593Smuzhiyun}; 26