1*4882a593Smuzhiyun* Marvell UART : Non standard UART used in some of Marvell EBU SoCs 2*4882a593Smuzhiyun e.g., Armada-3700. 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun- compatible: 6*4882a593Smuzhiyun - "marvell,armada-3700-uart" for the standard variant of the UART 7*4882a593Smuzhiyun (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the 8*4882a593Smuzhiyun FIFO, baudrate limited to 230400). 9*4882a593Smuzhiyun - "marvell,armada-3700-uart-ext" for the extended variant of the 10*4882a593Smuzhiyun UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit 11*4882a593Smuzhiyun accesses to the FIFO, baudrate unlimited by the dividers). 12*4882a593Smuzhiyun- reg: offset and length of the register set for the device. 13*4882a593Smuzhiyun- clocks: UART reference clock used to derive the baudrate. If no clock 14*4882a593Smuzhiyun is provided (possible only with the "marvell,armada-3700-uart" 15*4882a593Smuzhiyun compatible string for backward compatibility), it will only work 16*4882a593Smuzhiyun if the baudrate was initialized by the bootloader and no baudrate 17*4882a593Smuzhiyun change will then be possible. 18*4882a593Smuzhiyun- interrupts: 19*4882a593Smuzhiyun - Must contain three elements for the standard variant of the IP 20*4882a593Smuzhiyun (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx", 21*4882a593Smuzhiyun respectively the UART sum interrupt, the UART TX interrupt and 22*4882a593Smuzhiyun UART RX interrupt. A corresponding interrupt-names property must 23*4882a593Smuzhiyun be defined. 24*4882a593Smuzhiyun - Must contain two elements for the extended variant of the IP 25*4882a593Smuzhiyun (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx", 26*4882a593Smuzhiyun respectively the UART TX interrupt and the UART RX interrupt. A 27*4882a593Smuzhiyun corresponding interrupt-names property must be defined. 28*4882a593Smuzhiyun - For backward compatibility reasons, a single element interrupts 29*4882a593Smuzhiyun property is also supported for the standard variant of the IP, 30*4882a593Smuzhiyun containing only the UART sum interrupt. This form is deprecated 31*4882a593Smuzhiyun and should no longer be used. 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunExample: 34*4882a593Smuzhiyun uart0: serial@12000 { 35*4882a593Smuzhiyun compatible = "marvell,armada-3700-uart"; 36*4882a593Smuzhiyun reg = <0x12000 0x200>; 37*4882a593Smuzhiyun clocks = <&xtalclk>; 38*4882a593Smuzhiyun interrupts = 39*4882a593Smuzhiyun <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 40*4882a593Smuzhiyun <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 41*4882a593Smuzhiyun <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 42*4882a593Smuzhiyun interrupt-names = "uart-sum", "uart-tx", "uart-rx"; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun uart1: serial@12200 { 46*4882a593Smuzhiyun compatible = "marvell,armada-3700-uart-ext"; 47*4882a593Smuzhiyun reg = <0x12200 0x30>; 48*4882a593Smuzhiyun clocks = <&xtalclk>; 49*4882a593Smuzhiyun interrupts = 50*4882a593Smuzhiyun <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>, 51*4882a593Smuzhiyun <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>; 52*4882a593Smuzhiyun interrupt-names = "uart-tx", "uart-rx"; 53*4882a593Smuzhiyun }; 54