1*4882a593Smuzhiyun* STMicroelectronics SAS. ST33ZP24 TPM SoC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Should be "st,st33zp24-spi". 5*4882a593Smuzhiyun- spi-max-frequency: Maximum SPI frequency (<= 10000000). 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunOptional ST33ZP24 Properties: 8*4882a593Smuzhiyun- interrupts: GPIO interrupt to which the chip is connected 9*4882a593Smuzhiyun- lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state. 10*4882a593SmuzhiyunIf set, power must be present when the platform is going into sleep/hibernate mode. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunOptional SoC Specific Properties: 13*4882a593Smuzhiyun- pinctrl-names: Contains only one value - "default". 14*4882a593Smuzhiyun- pintctrl-0: Specifies the pin control groups used for this controller. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunExample (for ARM-based BeagleBoard xM with ST33ZP24 on SPI4): 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun&mcspi4 { 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun st33zp24@0 { 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun compatible = "st,st33zp24-spi"; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun spi-max-frequency = <10000000>; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 28*4882a593Smuzhiyun interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun lpcpd-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun}; 33