1*4882a593Smuzhiyun* STMicroelectronics SAS. ST33ZP24 TPM SoC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Should be "st,st33zp24-i2c". 5*4882a593Smuzhiyun- clock-frequency: I²C work frequency. 6*4882a593Smuzhiyun- reg: address on the bus 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunOptional ST33ZP24 Properties: 9*4882a593Smuzhiyun- interrupts: GPIO interrupt to which the chip is connected 10*4882a593Smuzhiyun- lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state. 11*4882a593SmuzhiyunIf set, power must be present when the platform is going into sleep/hibernate mode. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunOptional SoC Specific Properties: 14*4882a593Smuzhiyun- pinctrl-names: Contains only one value - "default". 15*4882a593Smuzhiyun- pintctrl-0: Specifies the pin control groups used for this controller. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExample (for ARM-based BeagleBoard xM with ST33ZP24 on I2C2): 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun&i2c2 { 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun st33zp24: st33zp24@13 { 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun compatible = "st,st33zp24-i2c"; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun reg = <0x13>; 27*4882a593Smuzhiyun clock-frequency = <400000>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 30*4882a593Smuzhiyun interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun lpcpd-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun}; 35