1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: STMicroelectronics STM32 Real Time Clock Bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Gabriel Fernandez <gabriel.fernandez@st.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun compatible: 14*4882a593Smuzhiyun enum: 15*4882a593Smuzhiyun - st,stm32-rtc 16*4882a593Smuzhiyun - st,stm32h7-rtc 17*4882a593Smuzhiyun - st,stm32mp1-rtc 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun reg: 20*4882a593Smuzhiyun maxItems: 1 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun clocks: 23*4882a593Smuzhiyun minItems: 1 24*4882a593Smuzhiyun maxItems: 2 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun clock-names: 27*4882a593Smuzhiyun items: 28*4882a593Smuzhiyun - const: pclk 29*4882a593Smuzhiyun - const: rtc_ck 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun interrupts: 32*4882a593Smuzhiyun maxItems: 1 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun st,syscfg: 35*4882a593Smuzhiyun $ref: "/schemas/types.yaml#/definitions/phandle-array" 36*4882a593Smuzhiyun items: 37*4882a593Smuzhiyun minItems: 3 38*4882a593Smuzhiyun maxItems: 3 39*4882a593Smuzhiyun description: | 40*4882a593Smuzhiyun Phandle/offset/mask triplet. The phandle to pwrcfg used to 41*4882a593Smuzhiyun access control register at offset, and change the dbp (Disable Backup 42*4882a593Smuzhiyun Protection) bit represented by the mask, mandatory to disable/enable backup 43*4882a593Smuzhiyun domain (RTC registers) write protection. 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun assigned-clocks: 46*4882a593Smuzhiyun description: | 47*4882a593Smuzhiyun override default rtc_ck parent clock reference to the rtc_ck clock entry 48*4882a593Smuzhiyun maxItems: 1 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun assigned-clock-parents: 51*4882a593Smuzhiyun description: | 52*4882a593Smuzhiyun override default rtc_ck parent clock phandle of the new parent clock of rtc_ck 53*4882a593Smuzhiyun maxItems: 1 54*4882a593Smuzhiyun 55*4882a593SmuzhiyunallOf: 56*4882a593Smuzhiyun - if: 57*4882a593Smuzhiyun properties: 58*4882a593Smuzhiyun compatible: 59*4882a593Smuzhiyun contains: 60*4882a593Smuzhiyun const: st,stm32-rtc 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun then: 63*4882a593Smuzhiyun properties: 64*4882a593Smuzhiyun clocks: 65*4882a593Smuzhiyun minItems: 1 66*4882a593Smuzhiyun maxItems: 1 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun clock-names: false 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun required: 71*4882a593Smuzhiyun - st,syscfg 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun - if: 74*4882a593Smuzhiyun properties: 75*4882a593Smuzhiyun compatible: 76*4882a593Smuzhiyun contains: 77*4882a593Smuzhiyun const: st,stm32h7-rtc 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun then: 80*4882a593Smuzhiyun properties: 81*4882a593Smuzhiyun clocks: 82*4882a593Smuzhiyun minItems: 2 83*4882a593Smuzhiyun maxItems: 2 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun required: 86*4882a593Smuzhiyun - clock-names 87*4882a593Smuzhiyun - st,syscfg 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun - if: 90*4882a593Smuzhiyun properties: 91*4882a593Smuzhiyun compatible: 92*4882a593Smuzhiyun contains: 93*4882a593Smuzhiyun const: st,stm32mp1-rtc 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun then: 96*4882a593Smuzhiyun properties: 97*4882a593Smuzhiyun clocks: 98*4882a593Smuzhiyun minItems: 2 99*4882a593Smuzhiyun maxItems: 2 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun assigned-clocks: false 102*4882a593Smuzhiyun assigned-clock-parents: false 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun required: 105*4882a593Smuzhiyun - clock-names 106*4882a593Smuzhiyun 107*4882a593Smuzhiyunrequired: 108*4882a593Smuzhiyun - compatible 109*4882a593Smuzhiyun - reg 110*4882a593Smuzhiyun - clocks 111*4882a593Smuzhiyun - interrupts 112*4882a593Smuzhiyun 113*4882a593SmuzhiyunadditionalProperties: false 114*4882a593Smuzhiyun 115*4882a593Smuzhiyunexamples: 116*4882a593Smuzhiyun - | 117*4882a593Smuzhiyun #include <dt-bindings/mfd/stm32f4-rcc.h> 118*4882a593Smuzhiyun #include <dt-bindings/clock/stm32fx-clock.h> 119*4882a593Smuzhiyun rtc@40002800 { 120*4882a593Smuzhiyun compatible = "st,stm32-rtc"; 121*4882a593Smuzhiyun reg = <0x40002800 0x400>; 122*4882a593Smuzhiyun clocks = <&rcc 1 CLK_RTC>; 123*4882a593Smuzhiyun assigned-clocks = <&rcc 1 CLK_RTC>; 124*4882a593Smuzhiyun assigned-clock-parents = <&rcc 1 CLK_LSE>; 125*4882a593Smuzhiyun interrupt-parent = <&exti>; 126*4882a593Smuzhiyun interrupts = <17 1>; 127*4882a593Smuzhiyun st,syscfg = <&pwrcfg 0x00 0x100>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 131*4882a593Smuzhiyun #include <dt-bindings/clock/stm32mp1-clks.h> 132*4882a593Smuzhiyun rtc@5c004000 { 133*4882a593Smuzhiyun compatible = "st,stm32mp1-rtc"; 134*4882a593Smuzhiyun reg = <0x5c004000 0x400>; 135*4882a593Smuzhiyun clocks = <&rcc RTCAPB>, <&rcc RTC>; 136*4882a593Smuzhiyun clock-names = "pclk", "rtc_ck"; 137*4882a593Smuzhiyun interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun... 141