1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/rtc/renesas,sh-rtc.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Real Time Clock for Renesas SH and ARM SoCs 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Chris Brandt <chris.brandt@renesas.com> 11*4882a593Smuzhiyun - Geert Uytterhoeven <geert+renesas@glider.be> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunproperties: 14*4882a593Smuzhiyun compatible: 15*4882a593Smuzhiyun items: 16*4882a593Smuzhiyun - const: renesas,r7s72100-rtc # RZ/A1H 17*4882a593Smuzhiyun - const: renesas,sh-rtc 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun reg: 20*4882a593Smuzhiyun maxItems: 1 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun interrupts: 23*4882a593Smuzhiyun maxItems: 3 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun interrupt-names: 26*4882a593Smuzhiyun items: 27*4882a593Smuzhiyun - const: alarm 28*4882a593Smuzhiyun - const: period 29*4882a593Smuzhiyun - const: carry 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun clocks: 32*4882a593Smuzhiyun # The functional clock source for the RTC controller must be listed 33*4882a593Smuzhiyun # first (if it exists). Additionally, potential clock counting sources 34*4882a593Smuzhiyun # are to be listed. 35*4882a593Smuzhiyun minItems: 1 36*4882a593Smuzhiyun maxItems: 4 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun clock-names: 39*4882a593Smuzhiyun # The functional clock must be labeled as "fck". Other clocks 40*4882a593Smuzhiyun # may be named in accordance to the SoC hardware manuals. 41*4882a593Smuzhiyun minItems: 1 42*4882a593Smuzhiyun maxItems: 4 43*4882a593Smuzhiyun items: 44*4882a593Smuzhiyun enum: [ fck, rtc_x1, rtc_x3, extal ] 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun power-domains: 47*4882a593Smuzhiyun maxItems: 1 48*4882a593Smuzhiyun 49*4882a593Smuzhiyunrequired: 50*4882a593Smuzhiyun - compatible 51*4882a593Smuzhiyun - reg 52*4882a593Smuzhiyun - interrupts 53*4882a593Smuzhiyun - interrupt-names 54*4882a593Smuzhiyun - clocks 55*4882a593Smuzhiyun - clock-names 56*4882a593Smuzhiyun - power-domains 57*4882a593Smuzhiyun 58*4882a593SmuzhiyunadditionalProperties: false 59*4882a593Smuzhiyun 60*4882a593Smuzhiyunexamples: 61*4882a593Smuzhiyun - | 62*4882a593Smuzhiyun #include <dt-bindings/clock/r7s72100-clock.h> 63*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 64*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/irq.h> 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun rtc: rtc@fcff1000 { 67*4882a593Smuzhiyun compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc"; 68*4882a593Smuzhiyun reg = <0xfcff1000 0x2e>; 69*4882a593Smuzhiyun interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING>, 70*4882a593Smuzhiyun <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>, 71*4882a593Smuzhiyun <GIC_SPI 278 IRQ_TYPE_EDGE_RISING>; 72*4882a593Smuzhiyun interrupt-names = "alarm", "period", "carry"; 73*4882a593Smuzhiyun clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>, 74*4882a593Smuzhiyun <&rtc_x3_clk>, <&extal_clk>; 75*4882a593Smuzhiyun power-domains = <&cpg_clocks>; 76*4882a593Smuzhiyun clock-names = "fck", "rtc_x1", "rtc_x3", "extal"; 77*4882a593Smuzhiyun }; 78