1*4882a593SmuzhiyunNVIDIA Tegra20 real-time clock 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Tegra RTC maintains seconds and milliseconds counters, and five alarm 4*4882a593Smuzhiyunregisters. The alarms and other interrupts may wake the system from low-power 5*4882a593Smuzhiyunstate. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun- compatible : For Tegra20, must contain "nvidia,tegra20-rtc". Otherwise, 10*4882a593Smuzhiyun must contain '"nvidia,<chip>-rtc", "nvidia,tegra20-rtc"', where <chip> 11*4882a593Smuzhiyun can be tegra30, tegra114, tegra124, or tegra132. 12*4882a593Smuzhiyun- reg : Specifies base physical address and size of the registers. 13*4882a593Smuzhiyun- interrupts : A single interrupt specifier. 14*4882a593Smuzhiyun- clocks : Must contain one entry, for the module clock. 15*4882a593Smuzhiyun See ../clocks/clock-bindings.txt for details. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExample: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyuntimer { 20*4882a593Smuzhiyun compatible = "nvidia,tegra20-rtc"; 21*4882a593Smuzhiyun reg = <0x7000e000 0x100>; 22*4882a593Smuzhiyun interrupts = <0 2 0x04>; 23*4882a593Smuzhiyun clocks = <&tegra_car 4>; 24*4882a593Smuzhiyun}; 25