1*4882a593Smuzhiyun* Maxim/Dallas Semiconductor DS-1302 RTC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunSimple device which could be used to store date/time between reboots. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunThe device uses the standard MicroWire half-duplex transfer timing. 6*4882a593SmuzhiyunMaster output is set on low clock and sensed by the RTC on the rising 7*4882a593Smuzhiyunedge. Master input is set by the RTC on the trailing edge and is sensed 8*4882a593Smuzhiyunby the master on low clock. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunRequired properties: 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun- compatible : Should be "maxim,ds1302" 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunRequired SPI properties: 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun- reg : Should be address of the device chip select within 17*4882a593Smuzhiyun the controller. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun- spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V, 20*4882a593Smuzhiyun and 2MHz if powered at 5V. 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun- spi-3wire : The device has a shared signal IN/OUT line. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun- spi-lsb-first : DS-1302 requires least significant bit first 25*4882a593Smuzhiyun transfers. 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun- spi-cs-high: DS-1302 has active high chip select line. This is 28*4882a593Smuzhiyun required unless inverted in hardware. 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunExample: 31*4882a593Smuzhiyun 32*4882a593Smuzhiyunspi@901c { 33*4882a593Smuzhiyun #address-cells = <1>; 34*4882a593Smuzhiyun #size-cells = <0>; 35*4882a593Smuzhiyun compatible = "icpdas,lp8841-spi-rtc"; 36*4882a593Smuzhiyun reg = <0x901c 0x1>; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun rtc@0 { 39*4882a593Smuzhiyun compatible = "maxim,ds1302"; 40*4882a593Smuzhiyun reg = <0>; 41*4882a593Smuzhiyun spi-max-frequency = <500000>; 42*4882a593Smuzhiyun spi-3wire; 43*4882a593Smuzhiyun spi-lsb-first; 44*4882a593Smuzhiyun spi-cs-high; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun}; 47