1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/rng/st,stm32-rng.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: STMicroelectronics STM32 RNG bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyundescription: | 10*4882a593Smuzhiyun The STM32 hardware random number generator is a simple fixed purpose 11*4882a593Smuzhiyun IP and is fully separated from other crypto functions. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunmaintainers: 14*4882a593Smuzhiyun - Lionel Debieve <lionel.debieve@st.com> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun const: st,stm32-rng 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun reg: 21*4882a593Smuzhiyun maxItems: 1 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun clocks: 24*4882a593Smuzhiyun maxItems: 1 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun resets: 27*4882a593Smuzhiyun maxItems: 1 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun clock-error-detect: 30*4882a593Smuzhiyun description: If set enable the clock detection management 31*4882a593Smuzhiyun 32*4882a593Smuzhiyunrequired: 33*4882a593Smuzhiyun - compatible 34*4882a593Smuzhiyun - reg 35*4882a593Smuzhiyun - clocks 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunadditionalProperties: false 38*4882a593Smuzhiyun 39*4882a593Smuzhiyunexamples: 40*4882a593Smuzhiyun - | 41*4882a593Smuzhiyun #include <dt-bindings/clock/stm32mp1-clks.h> 42*4882a593Smuzhiyun rng@54003000 { 43*4882a593Smuzhiyun compatible = "st,stm32-rng"; 44*4882a593Smuzhiyun reg = <0x54003000 0x400>; 45*4882a593Smuzhiyun clocks = <&rcc RNG1_K>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun... 49