xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun--------------------------------------------------------------------------
2*4882a593Smuzhiyun =  Zynq UltraScale+ MPSoC and Versal reset driver binding =
3*4882a593Smuzhiyun--------------------------------------------------------------------------
4*4882a593SmuzhiyunThe Zynq UltraScale+ MPSoC and Versal has several different resets.
5*4882a593Smuzhiyun
6*4882a593SmuzhiyunSee Chapter 36 of the Zynq UltraScale+ MPSoC TRM (UG) for more information
7*4882a593Smuzhiyunabout zynqmp resets.
8*4882a593Smuzhiyun
9*4882a593SmuzhiyunPlease also refer to reset.txt in this directory for common reset
10*4882a593Smuzhiyuncontroller binding usage.
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunRequired Properties:
13*4882a593Smuzhiyun- compatible:	"xlnx,zynqmp-reset" for Zynq UltraScale+ MPSoC platform
14*4882a593Smuzhiyun		"xlnx,versal-reset" for Versal platform
15*4882a593Smuzhiyun- #reset-cells:	Specifies the number of cells needed to encode reset
16*4882a593Smuzhiyun		line, should be 1
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun-------
19*4882a593SmuzhiyunExample
20*4882a593Smuzhiyun-------
21*4882a593Smuzhiyun
22*4882a593Smuzhiyunfirmware {
23*4882a593Smuzhiyun	zynqmp_firmware: zynqmp-firmware {
24*4882a593Smuzhiyun		compatible = "xlnx,zynqmp-firmware";
25*4882a593Smuzhiyun		method = "smc";
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun		zynqmp_reset: reset-controller {
28*4882a593Smuzhiyun			compatible = "xlnx,zynqmp-reset";
29*4882a593Smuzhiyun			#reset-cells = <1>;
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun};
33*4882a593Smuzhiyun
34*4882a593SmuzhiyunSpecifying reset lines connected to IP modules
35*4882a593Smuzhiyun==============================================
36*4882a593Smuzhiyun
37*4882a593SmuzhiyunDevice nodes that need access to reset lines should
38*4882a593Smuzhiyunspecify them as a reset phandle in their corresponding node as
39*4882a593Smuzhiyunspecified in reset.txt.
40*4882a593Smuzhiyun
41*4882a593SmuzhiyunFor list of all valid reset indices for Zynq UltraScale+ MPSoC see
42*4882a593Smuzhiyun<dt-bindings/reset/xlnx-zynqmp-resets.h>
43*4882a593SmuzhiyunFor list of all valid reset indices for Versal see
44*4882a593Smuzhiyun<dt-bindings/reset/xlnx-versal-resets.h>
45*4882a593Smuzhiyun
46*4882a593SmuzhiyunExample:
47*4882a593Smuzhiyun
48*4882a593Smuzhiyunserdes: zynqmp_phy@fd400000 {
49*4882a593Smuzhiyun	...
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
52*4882a593Smuzhiyun	reset-names = "sata_rst";
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	...
55*4882a593Smuzhiyun};
56