1*4882a593SmuzhiyunSynopsys DesignWare Reset controller 2*4882a593Smuzhiyun======================================= 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunPlease also refer to reset.txt in this directory for common reset 5*4882a593Smuzhiyuncontroller binding usage. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun- compatible: should be one of the following. 10*4882a593Smuzhiyun "snps,dw-high-reset" - for active high configuration 11*4882a593Smuzhiyun "snps,dw-low-reset" - for active low configuration 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 14*4882a593Smuzhiyun region. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun- #reset-cells: must be 1. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunexample: 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun dw_rst_1: reset-controller@0000 { 21*4882a593Smuzhiyun compatible = "snps,dw-high-reset"; 22*4882a593Smuzhiyun reg = <0x0000 0x4>; 23*4882a593Smuzhiyun #reset-cells = <1>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun dw_rst_2: reset-controller@1000 {i 27*4882a593Smuzhiyun compatible = "snps,dw-low-reset"; 28*4882a593Smuzhiyun reg = <0x1000 0x8>; 29*4882a593Smuzhiyun #reset-cells = <1>; 30*4882a593Smuzhiyun }; 31