1*4882a593SmuzhiyunCSR SiRFSoC Reset Controller 2*4882a593Smuzhiyun====================================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunPlease also refer to reset.txt in this directory for common reset 5*4882a593Smuzhiyuncontroller binding usage. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun- compatible: Should be "sirf,prima2-rstc" or "sirf,marco-rstc" 9*4882a593Smuzhiyun- reg: should be register base and length as documented in the 10*4882a593Smuzhiyun datasheet 11*4882a593Smuzhiyun- #reset-cells: 1, see below 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunexample: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunrstc: reset-controller@88010000 { 16*4882a593Smuzhiyun compatible = "sirf,prima2-rstc"; 17*4882a593Smuzhiyun reg = <0x88010000 0x1000>; 18*4882a593Smuzhiyun #reset-cells = <1>; 19*4882a593Smuzhiyun}; 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunSpecifying reset lines connected to IP modules 22*4882a593Smuzhiyun============================================== 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunThe reset controller(rstc) manages various reset sources. This module provides 25*4882a593Smuzhiyunreset signals for most blocks in system. Those device nodes should specify the 26*4882a593Smuzhiyunreset line on the rstc in their resets property, containing a phandle to the 27*4882a593Smuzhiyunrstc device node and a RESET_INDEX specifying which module to reset, as described 28*4882a593Smuzhiyunin reset.txt. 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunFor SiRFSoC, RESET_INDEX is just reset_bit defined in SW_RST0 and SW_RST1 registers. 31*4882a593SmuzhiyunFor modules whose rest_bit is in SW_RST0, its RESET_INDEX is 0~31. For modules whose 32*4882a593Smuzhiyunrest_bit is in SW_RST1, its RESET_INDEX is 32~63. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyunexample: 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunvpp@90020000 { 37*4882a593Smuzhiyun compatible = "sirf,prima2-vpp"; 38*4882a593Smuzhiyun reg = <0x90020000 0x10000>; 39*4882a593Smuzhiyun interrupts = <31>; 40*4882a593Smuzhiyun clocks = <&clks 35>; 41*4882a593Smuzhiyun resets = <&rstc 6>; 42*4882a593Smuzhiyun}; 43