1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/reset/renesas,rst.yaml#" 5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Renesas R-Car and RZ/G Reset Controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Geert Uytterhoeven <geert+renesas@glider.be> 11*4882a593Smuzhiyun - Magnus Damm <magnus.damm@gmail.com> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundescription: | 14*4882a593Smuzhiyun The R-Car and RZ/G Reset Controllers provide reset control, and implement the 15*4882a593Smuzhiyun following functions: 16*4882a593Smuzhiyun - Latching of the levels on mode pins when PRESET# is negated, 17*4882a593Smuzhiyun - Mode monitoring register, 18*4882a593Smuzhiyun - Reset control of peripheral devices (on R-Car Gen1), 19*4882a593Smuzhiyun - Watchdog timer (on R-Car Gen1), 20*4882a593Smuzhiyun - Register-based reset control and boot address registers for the various 21*4882a593Smuzhiyun CPU cores (on R-Car Gen2 and Gen3, and on RZ/G). 22*4882a593Smuzhiyun 23*4882a593Smuzhiyunproperties: 24*4882a593Smuzhiyun compatible: 25*4882a593Smuzhiyun enum: 26*4882a593Smuzhiyun - renesas,r8a7742-rst # RZ/G1H 27*4882a593Smuzhiyun - renesas,r8a7743-rst # RZ/G1M 28*4882a593Smuzhiyun - renesas,r8a7744-rst # RZ/G1N 29*4882a593Smuzhiyun - renesas,r8a7745-rst # RZ/G1E 30*4882a593Smuzhiyun - renesas,r8a77470-rst # RZ/G1C 31*4882a593Smuzhiyun - renesas,r8a774a1-rst # RZ/G2M 32*4882a593Smuzhiyun - renesas,r8a774b1-rst # RZ/G2N 33*4882a593Smuzhiyun - renesas,r8a774c0-rst # RZ/G2E 34*4882a593Smuzhiyun - renesas,r8a774e1-rst # RZ/G2H 35*4882a593Smuzhiyun - renesas,r8a7778-reset-wdt # R-Car M1A 36*4882a593Smuzhiyun - renesas,r8a7779-reset-wdt # R-Car H1 37*4882a593Smuzhiyun - renesas,r8a7790-rst # R-Car H2 38*4882a593Smuzhiyun - renesas,r8a7791-rst # R-Car M2-W 39*4882a593Smuzhiyun - renesas,r8a7792-rst # R-Car V2H 40*4882a593Smuzhiyun - renesas,r8a7793-rst # R-Car M2-N 41*4882a593Smuzhiyun - renesas,r8a7794-rst # R-Car E2 42*4882a593Smuzhiyun - renesas,r8a7795-rst # R-Car H3 43*4882a593Smuzhiyun - renesas,r8a7796-rst # R-Car M3-W 44*4882a593Smuzhiyun - renesas,r8a77961-rst # R-Car M3-W+ 45*4882a593Smuzhiyun - renesas,r8a77965-rst # R-Car M3-N 46*4882a593Smuzhiyun - renesas,r8a77970-rst # R-Car V3M 47*4882a593Smuzhiyun - renesas,r8a77980-rst # R-Car V3H 48*4882a593Smuzhiyun - renesas,r8a77990-rst # R-Car E3 49*4882a593Smuzhiyun - renesas,r8a77995-rst # R-Car D3 50*4882a593Smuzhiyun - renesas,r8a779a0-rst # R-Car V3U 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun reg: 53*4882a593Smuzhiyun maxItems: 1 54*4882a593Smuzhiyun 55*4882a593Smuzhiyunrequired: 56*4882a593Smuzhiyun - compatible 57*4882a593Smuzhiyun - reg 58*4882a593Smuzhiyun 59*4882a593SmuzhiyunadditionalProperties: false 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunexamples: 62*4882a593Smuzhiyun - | 63*4882a593Smuzhiyun rst: reset-controller@e6160000 { 64*4882a593Smuzhiyun compatible = "renesas,r8a7795-rst"; 65*4882a593Smuzhiyun reg = <0xe6160000 0x0200>; 66*4882a593Smuzhiyun }; 67