1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Freescale i.MX7 System Reset Controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Andrey Smirnov <andrew.smirnov@gmail.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun The system reset controller can be used to reset various set of 14*4882a593Smuzhiyun peripherals. Device nodes that need access to reset lines should 15*4882a593Smuzhiyun specify them as a reset phandle in their corresponding node as 16*4882a593Smuzhiyun specified in reset.txt. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun For list of all valid reset indices see 19*4882a593Smuzhiyun <dt-bindings/reset/imx7-reset.h> for i.MX7, 20*4882a593Smuzhiyun <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ, i.MX8MM and i.MX8MN, 21*4882a593Smuzhiyun <dt-bindings/reset/imx8mp-reset.h> for i.MX8MP. 22*4882a593Smuzhiyun 23*4882a593Smuzhiyunproperties: 24*4882a593Smuzhiyun compatible: 25*4882a593Smuzhiyun oneOf: 26*4882a593Smuzhiyun - items: 27*4882a593Smuzhiyun - enum: 28*4882a593Smuzhiyun - fsl,imx7d-src 29*4882a593Smuzhiyun - fsl,imx8mq-src 30*4882a593Smuzhiyun - fsl,imx8mp-src 31*4882a593Smuzhiyun - const: syscon 32*4882a593Smuzhiyun - items: 33*4882a593Smuzhiyun - enum: 34*4882a593Smuzhiyun - fsl,imx8mm-src 35*4882a593Smuzhiyun - fsl,imx8mn-src 36*4882a593Smuzhiyun - const: fsl,imx8mq-src 37*4882a593Smuzhiyun - const: syscon 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun reg: 40*4882a593Smuzhiyun maxItems: 1 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun interrupts: 43*4882a593Smuzhiyun maxItems: 1 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun '#reset-cells': 46*4882a593Smuzhiyun const: 1 47*4882a593Smuzhiyun 48*4882a593Smuzhiyunrequired: 49*4882a593Smuzhiyun - compatible 50*4882a593Smuzhiyun - reg 51*4882a593Smuzhiyun - interrupts 52*4882a593Smuzhiyun - '#reset-cells' 53*4882a593Smuzhiyun 54*4882a593SmuzhiyunadditionalProperties: false 55*4882a593Smuzhiyun 56*4882a593Smuzhiyunexamples: 57*4882a593Smuzhiyun - | 58*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun reset-controller@30390000 { 61*4882a593Smuzhiyun compatible = "fsl,imx7d-src", "syscon"; 62*4882a593Smuzhiyun reg = <0x30390000 0x2000>; 63*4882a593Smuzhiyun interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 64*4882a593Smuzhiyun #reset-cells = <1>; 65*4882a593Smuzhiyun }; 66