xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: TI K3 DSP devices
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Suman Anna <s-anna@ti.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyundescription: |
13*4882a593Smuzhiyun  The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14*4882a593Smuzhiyun  that are used to offload some of the processor-intensive tasks or algorithms,
15*4882a593Smuzhiyun  for achieving various system level goals.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun  These processor sub-systems usually contain additional sub-modules like
18*4882a593Smuzhiyun  L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
19*4882a593Smuzhiyun  controller, a dedicated local power/sleep controller etc. The DSP processor
20*4882a593Smuzhiyun  cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a
21*4882a593Smuzhiyun  TMS320C71x CorePac processor.
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun  Each DSP Core sub-system is represented as a single DT node. Each node has a
24*4882a593Smuzhiyun  number of required or optional properties that enable the OS running on the
25*4882a593Smuzhiyun  host processor (Arm CorePac) to perform the device management of the remote
26*4882a593Smuzhiyun  processor and to communicate with the remote processor.
27*4882a593Smuzhiyun
28*4882a593SmuzhiyunallOf:
29*4882a593Smuzhiyun  - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
30*4882a593Smuzhiyun
31*4882a593Smuzhiyunproperties:
32*4882a593Smuzhiyun  compatible:
33*4882a593Smuzhiyun    enum:
34*4882a593Smuzhiyun      - ti,j721e-c66-dsp
35*4882a593Smuzhiyun      - ti,j721e-c71-dsp
36*4882a593Smuzhiyun    description:
37*4882a593Smuzhiyun      Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs
38*4882a593Smuzhiyun      Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun  resets:
41*4882a593Smuzhiyun    description: |
42*4882a593Smuzhiyun      Should contain the phandle to the reset controller node managing the
43*4882a593Smuzhiyun      local resets for this device, and a reset specifier.
44*4882a593Smuzhiyun    maxItems: 1
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  firmware-name:
47*4882a593Smuzhiyun    description: |
48*4882a593Smuzhiyun      Should contain the name of the default firmware image
49*4882a593Smuzhiyun      file located on the firmware search path
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun  mboxes:
52*4882a593Smuzhiyun    description: |
53*4882a593Smuzhiyun      OMAP Mailbox specifier denoting the sub-mailbox, to be used for
54*4882a593Smuzhiyun      communication with the remote processor. This property should match
55*4882a593Smuzhiyun      with the sub-mailbox node used in the firmware image.
56*4882a593Smuzhiyun    maxItems: 1
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun  memory-region:
59*4882a593Smuzhiyun    minItems: 2
60*4882a593Smuzhiyun    maxItems: 8
61*4882a593Smuzhiyun    description: |
62*4882a593Smuzhiyun      phandle to the reserved memory nodes to be associated with the remoteproc
63*4882a593Smuzhiyun      device. There should be at least two reserved memory nodes defined. The
64*4882a593Smuzhiyun      reserved memory nodes should be carveout nodes, and should be defined as
65*4882a593Smuzhiyun      per the bindings in
66*4882a593Smuzhiyun      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
67*4882a593Smuzhiyun    items:
68*4882a593Smuzhiyun      - description: region used for dynamic DMA allocations like vrings and
69*4882a593Smuzhiyun                     vring buffers
70*4882a593Smuzhiyun      - description: region reserved for firmware image sections
71*4882a593Smuzhiyun    additionalItems: true
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun# Optional properties:
74*4882a593Smuzhiyun# --------------------
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun  sram:
77*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/phandle-array
78*4882a593Smuzhiyun    minItems: 1
79*4882a593Smuzhiyun    maxItems: 4
80*4882a593Smuzhiyun    description: |
81*4882a593Smuzhiyun      phandles to one or more reserved on-chip SRAM regions. The regions
82*4882a593Smuzhiyun      should be defined as child nodes of the respective SRAM node, and
83*4882a593Smuzhiyun      should be defined as per the generic bindings in,
84*4882a593Smuzhiyun      Documentation/devicetree/bindings/sram/sram.yaml
85*4882a593Smuzhiyun
86*4882a593Smuzhiyunif:
87*4882a593Smuzhiyun  properties:
88*4882a593Smuzhiyun    compatible:
89*4882a593Smuzhiyun      enum:
90*4882a593Smuzhiyun        - ti,j721e-c66-dsp
91*4882a593Smuzhiyunthen:
92*4882a593Smuzhiyun  properties:
93*4882a593Smuzhiyun    reg:
94*4882a593Smuzhiyun      items:
95*4882a593Smuzhiyun        - description: Address and Size of the L2 SRAM internal memory region
96*4882a593Smuzhiyun        - description: Address and Size of the L1 PRAM internal memory region
97*4882a593Smuzhiyun        - description: Address and Size of the L1 DRAM internal memory region
98*4882a593Smuzhiyun    reg-names:
99*4882a593Smuzhiyun      items:
100*4882a593Smuzhiyun        - const: l2sram
101*4882a593Smuzhiyun        - const: l1pram
102*4882a593Smuzhiyun        - const: l1dram
103*4882a593Smuzhiyunelse:
104*4882a593Smuzhiyun  if:
105*4882a593Smuzhiyun    properties:
106*4882a593Smuzhiyun      compatible:
107*4882a593Smuzhiyun        enum:
108*4882a593Smuzhiyun          - ti,j721e-c71-dsp
109*4882a593Smuzhiyun  then:
110*4882a593Smuzhiyun    properties:
111*4882a593Smuzhiyun      reg:
112*4882a593Smuzhiyun        items:
113*4882a593Smuzhiyun          - description: Address and Size of the L2 SRAM internal memory region
114*4882a593Smuzhiyun          - description: Address and Size of the L1 DRAM internal memory region
115*4882a593Smuzhiyun      reg-names:
116*4882a593Smuzhiyun        items:
117*4882a593Smuzhiyun          - const: l2sram
118*4882a593Smuzhiyun          - const: l1dram
119*4882a593Smuzhiyun
120*4882a593Smuzhiyunrequired:
121*4882a593Smuzhiyun  - compatible
122*4882a593Smuzhiyun  - reg
123*4882a593Smuzhiyun  - reg-names
124*4882a593Smuzhiyun  - ti,sci
125*4882a593Smuzhiyun  - ti,sci-dev-id
126*4882a593Smuzhiyun  - ti,sci-proc-ids
127*4882a593Smuzhiyun  - resets
128*4882a593Smuzhiyun  - firmware-name
129*4882a593Smuzhiyun  - mboxes
130*4882a593Smuzhiyun  - memory-region
131*4882a593Smuzhiyun
132*4882a593SmuzhiyununevaluatedProperties: false
133*4882a593Smuzhiyun
134*4882a593Smuzhiyunexamples:
135*4882a593Smuzhiyun  - |
136*4882a593Smuzhiyun    / {
137*4882a593Smuzhiyun        model = "Texas Instruments K3 J721E SoC";
138*4882a593Smuzhiyun        compatible = "ti,j721e";
139*4882a593Smuzhiyun        #address-cells = <2>;
140*4882a593Smuzhiyun        #size-cells = <2>;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun        bus@100000 {
143*4882a593Smuzhiyun            compatible = "simple-bus";
144*4882a593Smuzhiyun            #address-cells = <2>;
145*4882a593Smuzhiyun            #size-cells = <2>;
146*4882a593Smuzhiyun            ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
147*4882a593Smuzhiyun                     <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */
148*4882a593Smuzhiyun                     <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */
149*4882a593Smuzhiyun                     <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun            /* J721E C66_0 DSP node */
152*4882a593Smuzhiyun            dsp@4d80800000 {
153*4882a593Smuzhiyun                compatible = "ti,j721e-c66-dsp";
154*4882a593Smuzhiyun                reg = <0x4d 0x80800000 0x00 0x00048000>,
155*4882a593Smuzhiyun                      <0x4d 0x80e00000 0x00 0x00008000>,
156*4882a593Smuzhiyun                      <0x4d 0x80f00000 0x00 0x00008000>;
157*4882a593Smuzhiyun                reg-names = "l2sram", "l1pram", "l1dram";
158*4882a593Smuzhiyun                ti,sci = <&dmsc>;
159*4882a593Smuzhiyun                ti,sci-dev-id = <142>;
160*4882a593Smuzhiyun                ti,sci-proc-ids = <0x03 0xFF>;
161*4882a593Smuzhiyun                resets = <&k3_reset 142 1>;
162*4882a593Smuzhiyun                firmware-name = "j7-c66_0-fw";
163*4882a593Smuzhiyun                memory-region = <&c66_0_dma_memory_region>,
164*4882a593Smuzhiyun                                <&c66_0_memory_region>;
165*4882a593Smuzhiyun                mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
166*4882a593Smuzhiyun            };
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun            /* J721E C71_0 DSP node */
169*4882a593Smuzhiyun            c71_0: dsp@64800000 {
170*4882a593Smuzhiyun                compatible = "ti,j721e-c71-dsp";
171*4882a593Smuzhiyun                reg = <0x00 0x64800000 0x00 0x00080000>,
172*4882a593Smuzhiyun                      <0x00 0x64e00000 0x00 0x0000c000>;
173*4882a593Smuzhiyun                reg-names = "l2sram", "l1dram";
174*4882a593Smuzhiyun                ti,sci = <&dmsc>;
175*4882a593Smuzhiyun                ti,sci-dev-id = <15>;
176*4882a593Smuzhiyun                ti,sci-proc-ids = <0x30 0xFF>;
177*4882a593Smuzhiyun                resets = <&k3_reset 15 1>;
178*4882a593Smuzhiyun                firmware-name = "j7-c71_0-fw";
179*4882a593Smuzhiyun                memory-region = <&c71_0_dma_memory_region>,
180*4882a593Smuzhiyun                                <&c71_0_memory_region>;
181*4882a593Smuzhiyun                mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
182*4882a593Smuzhiyun            };
183*4882a593Smuzhiyun        };
184*4882a593Smuzhiyun    };
185