xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/remoteproc/ti,davinci-rproc.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunTI Davinci DSP devices
2*4882a593Smuzhiyun=======================
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunBinding status: Unstable - Subject to changes for DT representation of clocks
5*4882a593Smuzhiyun			   and resets
6*4882a593Smuzhiyun
7*4882a593SmuzhiyunThe TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
8*4882a593Smuzhiyunis used to offload some of the processor-intensive tasks or algorithms, for
9*4882a593Smuzhiyunachieving various system level goals.
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunThe processor cores in the sub-system usually contain additional sub-modules
12*4882a593Smuzhiyunlike L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
13*4882a593Smuzhiyuncontroller, a dedicated local power/sleep controller etc. The DSP processor
14*4882a593Smuzhiyuncore used in Davinci SoCs is usually a C674x DSP CPU.
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunDSP Device Node:
17*4882a593Smuzhiyun================
18*4882a593SmuzhiyunEach DSP Core sub-system is represented as a single DT node.
19*4882a593Smuzhiyun
20*4882a593SmuzhiyunRequired properties:
21*4882a593Smuzhiyun--------------------
22*4882a593SmuzhiyunThe following are the mandatory properties:
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun- compatible:		Should be one of the following,
25*4882a593Smuzhiyun			    "ti,da850-dsp" for DSPs on OMAP-L138 SoCs
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun- reg:			Should contain an entry for each value in 'reg-names'.
28*4882a593Smuzhiyun			Each entry should have the memory region's start address
29*4882a593Smuzhiyun			and the size of the region, the representation matching
30*4882a593Smuzhiyun			the parent node's '#address-cells' and '#size-cells' values.
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun- reg-names:		Should contain strings with the following names, each
33*4882a593Smuzhiyun			representing a specific internal memory region or a
34*4882a593Smuzhiyun			specific register space,
35*4882a593Smuzhiyun			     "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig_base"
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun- interrupts: 		Should contain the interrupt number used to receive the
38*4882a593Smuzhiyun			interrupts from the DSP. The value should follow the
39*4882a593Smuzhiyun			interrupt-specifier format as dictated by the
40*4882a593Smuzhiyun			'interrupt-parent' node.
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun- memory-region:	phandle to the reserved memory node to be associated
43*4882a593Smuzhiyun			with the remoteproc device. The reserved memory node
44*4882a593Smuzhiyun			can be a CMA memory node, and should be defined as
45*4882a593Smuzhiyun			per the bindings in
46*4882a593Smuzhiyun			Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun
49*4882a593SmuzhiyunExample:
50*4882a593Smuzhiyun--------
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	/* DSP Reserved Memory node */
53*4882a593Smuzhiyun	reserved-memory {
54*4882a593Smuzhiyun		#address-cells = <1>;
55*4882a593Smuzhiyun		#size-cells = <1>;
56*4882a593Smuzhiyun		ranges;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun		dsp_memory_region: dsp-memory@c3000000 {
59*4882a593Smuzhiyun			compatible = "shared-dma-pool";
60*4882a593Smuzhiyun			reg = <0xc3000000 0x1000000>;
61*4882a593Smuzhiyun			reusable;
62*4882a593Smuzhiyun		};
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	/* DSP node */
66*4882a593Smuzhiyun	{
67*4882a593Smuzhiyun		dsp: dsp@11800000 {
68*4882a593Smuzhiyun			compatible = "ti,da850-dsp";
69*4882a593Smuzhiyun			reg = <0x11800000 0x40000>,
70*4882a593Smuzhiyun			      <0x11e00000 0x8000>,
71*4882a593Smuzhiyun			      <0x11f00000 0x8000>,
72*4882a593Smuzhiyun			      <0x01c14044 0x4>,
73*4882a593Smuzhiyun			      <0x01c14174 0x8>;
74*4882a593Smuzhiyun			reg-names = "l2sram", "l1pram", "l1dram", "host1cfg",
75*4882a593Smuzhiyun				    "chipsig";
76*4882a593Smuzhiyun			interrupt-parent = <&intc>;
77*4882a593Smuzhiyun			interrupts = <28>;
78*4882a593Smuzhiyun			memory-region = <&dsp_memory_region>;
79*4882a593Smuzhiyun		};
80*4882a593Smuzhiyun	};
81