1*4882a593SmuzhiyunSTMicroelectronics Co-Processor Bindings 2*4882a593Smuzhiyun---------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThis binding provides support for adjunct processors found on ST SoCs. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunCo-processors can be controlled from the bootloader or the primary OS. If 7*4882a593Smuzhiyunthe bootloader starts a co-processor, the primary OS must detect its state 8*4882a593Smuzhiyunand act accordingly. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunRequired properties: 11*4882a593Smuzhiyun- compatible Should be one of: 12*4882a593Smuzhiyun "st,st231-rproc" 13*4882a593Smuzhiyun "st,st40-rproc" 14*4882a593Smuzhiyun- memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt) 15*4882a593Smuzhiyun- resets Reset lines (See: ../reset/reset.txt) 16*4882a593Smuzhiyun- reset-names Must be "sw_reset" and "pwr_reset" 17*4882a593Smuzhiyun- clocks Clock for co-processor (See: ../clock/clock-bindings.txt) 18*4882a593Smuzhiyun- clock-frequency Clock frequency to set co-processor at if the bootloader 19*4882a593Smuzhiyun hasn't already done so 20*4882a593Smuzhiyun- st,syscfg System configuration register which holds the boot vector 21*4882a593Smuzhiyun for the co-processor 22*4882a593Smuzhiyun 1st cell: Phandle to syscon block 23*4882a593Smuzhiyun 2nd cell: Boot vector register offset 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunExample: 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun audio_reserved: rproc@42000000 { 28*4882a593Smuzhiyun compatible = "shared-dma-pool"; 29*4882a593Smuzhiyun reg = <0x42000000 0x01000000>; 30*4882a593Smuzhiyun no-map; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun st231-audio { 34*4882a593Smuzhiyun compatible = "st,st231-rproc"; 35*4882a593Smuzhiyun memory-region = <&audio_reserved>; 36*4882a593Smuzhiyun resets = <&softreset STIH407_ST231_AUD_SOFTRESET>; 37*4882a593Smuzhiyun reset-names = "sw_reset"; 38*4882a593Smuzhiyun clocks = <&clk_s_c0_flexgen CLK_ST231_AUD_0>; 39*4882a593Smuzhiyun clock-frequency = <600000000>; 40*4882a593Smuzhiyun st,syscfg = <&syscfg_core 0x228>; 41*4882a593Smuzhiyun }; 42