1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/remoteproc/ingenic,vpu.yaml#" 5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Ingenic Video Processing Unit bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyundescription: 10*4882a593Smuzhiyun Inside the Video Processing Unit (VPU) of the recent JZ47xx SoCs from 11*4882a593Smuzhiyun Ingenic is a second Xburst MIPS CPU very similar to the main core. 12*4882a593Smuzhiyun This document describes the devicetree bindings for this auxiliary 13*4882a593Smuzhiyun processor. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunmaintainers: 16*4882a593Smuzhiyun - Paul Cercueil <paul@crapouillou.net> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunproperties: 19*4882a593Smuzhiyun compatible: 20*4882a593Smuzhiyun const: ingenic,jz4770-vpu-rproc 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun reg: 23*4882a593Smuzhiyun items: 24*4882a593Smuzhiyun - description: aux registers 25*4882a593Smuzhiyun - description: tcsm0 registers 26*4882a593Smuzhiyun - description: tcsm1 registers 27*4882a593Smuzhiyun - description: sram registers 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun reg-names: 30*4882a593Smuzhiyun items: 31*4882a593Smuzhiyun - const: aux 32*4882a593Smuzhiyun - const: tcsm0 33*4882a593Smuzhiyun - const: tcsm1 34*4882a593Smuzhiyun - const: sram 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun clocks: 37*4882a593Smuzhiyun items: 38*4882a593Smuzhiyun - description: aux clock 39*4882a593Smuzhiyun - description: vpu clock 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun clock-names: 42*4882a593Smuzhiyun items: 43*4882a593Smuzhiyun - const: aux 44*4882a593Smuzhiyun - const: vpu 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun interrupts: 47*4882a593Smuzhiyun description: VPU hardware interrupt 48*4882a593Smuzhiyun 49*4882a593Smuzhiyunrequired: 50*4882a593Smuzhiyun - compatible 51*4882a593Smuzhiyun - reg 52*4882a593Smuzhiyun - reg-names 53*4882a593Smuzhiyun - clocks 54*4882a593Smuzhiyun - clock-names 55*4882a593Smuzhiyun - interrupts 56*4882a593Smuzhiyun 57*4882a593SmuzhiyunadditionalProperties: false 58*4882a593Smuzhiyun 59*4882a593Smuzhiyunexamples: 60*4882a593Smuzhiyun - | 61*4882a593Smuzhiyun #include <dt-bindings/clock/jz4770-cgu.h> 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun vpu: video-decoder@132a0000 { 64*4882a593Smuzhiyun compatible = "ingenic,jz4770-vpu-rproc"; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun reg = <0x132a0000 0x20>, /* AUX */ 67*4882a593Smuzhiyun <0x132b0000 0x4000>, /* TCSM0 */ 68*4882a593Smuzhiyun <0x132c0000 0xc000>, /* TCSM1 */ 69*4882a593Smuzhiyun <0x132f0000 0x7000>; /* SRAM */ 70*4882a593Smuzhiyun reg-names = "aux", "tcsm0", "tcsm1", "sram"; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun clocks = <&cgu JZ4770_CLK_AUX>, <&cgu JZ4770_CLK_VPU>; 73*4882a593Smuzhiyun clock-names = "aux", "vpu"; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun interrupt-parent = <&cpuintc>; 76*4882a593Smuzhiyun interrupts = <3>; 77*4882a593Smuzhiyun }; 78