1*4882a593SmuzhiyunNVIDIA Tegra Regulators Coupling 2*4882a593Smuzhiyun================================ 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunNVIDIA Tegra SoC's have a mandatory voltage-coupling between regulators. 5*4882a593SmuzhiyunThus on Tegra20 there are 3 coupled regulators and on NVIDIA Tegra30 6*4882a593Smuzhiyunthere are 2. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunTegra20 voltage coupling 9*4882a593Smuzhiyun------------------------ 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunOn Tegra20 SoC's there are 3 coupled regulators: CORE, RTC and CPU. 12*4882a593SmuzhiyunThe CORE and RTC voltages shall be in a range of 170mV from each other 13*4882a593Smuzhiyunand they both shall be higher than the CPU voltage by at least 120mV. 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunTegra30 voltage coupling 16*4882a593Smuzhiyun------------------------ 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunOn Tegra30 SoC's there are 2 coupled regulators: CORE and CPU. The CORE 19*4882a593Smuzhiyunand CPU voltages shall be in a range of 300mV from each other and CORE 20*4882a593Smuzhiyunvoltage shall be higher than the CPU by N mV, where N depends on the CPU 21*4882a593Smuzhiyunvoltage. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunRequired properties: 24*4882a593Smuzhiyun- nvidia,tegra-core-regulator: Boolean property that designates regulator 25*4882a593Smuzhiyun as the "Core domain" voltage regulator. 26*4882a593Smuzhiyun- nvidia,tegra-rtc-regulator: Boolean property that designates regulator 27*4882a593Smuzhiyun as the "RTC domain" voltage regulator. 28*4882a593Smuzhiyun- nvidia,tegra-cpu-regulator: Boolean property that designates regulator 29*4882a593Smuzhiyun as the "CPU domain" voltage regulator. 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunExample: 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun pmic { 34*4882a593Smuzhiyun regulators { 35*4882a593Smuzhiyun core_vdd_reg: core { 36*4882a593Smuzhiyun regulator-name = "vdd_core"; 37*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 38*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 39*4882a593Smuzhiyun regulator-coupled-with = <&rtc_vdd_reg &cpu_vdd_reg>; 40*4882a593Smuzhiyun regulator-coupled-max-spread = <170000 550000>; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun nvidia,tegra-core-regulator; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun rtc_vdd_reg: rtc { 46*4882a593Smuzhiyun regulator-name = "vdd_rtc"; 47*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 48*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 49*4882a593Smuzhiyun regulator-coupled-with = <&core_vdd_reg &cpu_vdd_reg>; 50*4882a593Smuzhiyun regulator-coupled-max-spread = <170000 550000>; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun nvidia,tegra-rtc-regulator; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun cpu_vdd_reg: cpu { 56*4882a593Smuzhiyun regulator-name = "vdd_cpu"; 57*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 58*4882a593Smuzhiyun regulator-max-microvolt = <1125000>; 59*4882a593Smuzhiyun regulator-coupled-with = <&core_vdd_reg &rtc_vdd_reg>; 60*4882a593Smuzhiyun regulator-coupled-max-spread = <550000 550000>; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun nvidia,tegra-cpu-regulator; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun }; 66