1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/regulator/anatop-regulator.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Freescale Anatop Voltage Regulators 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunallOf: 13*4882a593Smuzhiyun - $ref: "regulator.yaml#" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun const: fsl,anatop-regulator 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun regulator-name: true 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun anatop-reg-offset: 22*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/uint32' 23*4882a593Smuzhiyun description: u32 value representing the anatop MFD register offset. 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun anatop-vol-bit-shift: 26*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/uint32' 27*4882a593Smuzhiyun description: u32 value representing the bit shift for the register. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun anatop-vol-bit-width: 30*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/uint32' 31*4882a593Smuzhiyun description: u32 value representing the number of bits used in the register. 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun anatop-min-bit-val: 34*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/uint32' 35*4882a593Smuzhiyun description: u32 value representing the minimum value of this register. 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun anatop-min-voltage: 38*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/uint32' 39*4882a593Smuzhiyun description: u32 value representing the minimum voltage of this regulator. 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun anatop-max-voltage: 42*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/uint32' 43*4882a593Smuzhiyun description: u32 value representing the maximum voltage of this regulator. 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun anatop-delay-reg-offset: 46*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/uint32' 47*4882a593Smuzhiyun description: u32 value representing the anatop MFD step time register offset. 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun anatop-delay-bit-shift: 50*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/uint32' 51*4882a593Smuzhiyun description: u32 value representing the bit shift for the step time register. 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun anatop-delay-bit-width: 54*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/uint32' 55*4882a593Smuzhiyun description: u32 value representing the number of bits used in the step time register. 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun anatop-enable-bit: 58*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/uint32' 59*4882a593Smuzhiyun description: u32 value representing regulator enable bit offset. 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun vin-supply: 62*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/phandle' 63*4882a593Smuzhiyun description: input supply phandle. 64*4882a593Smuzhiyun 65*4882a593Smuzhiyunrequired: 66*4882a593Smuzhiyun - compatible 67*4882a593Smuzhiyun - regulator-name 68*4882a593Smuzhiyun - anatop-reg-offset 69*4882a593Smuzhiyun - anatop-vol-bit-shift 70*4882a593Smuzhiyun - anatop-vol-bit-width 71*4882a593Smuzhiyun - anatop-min-bit-val 72*4882a593Smuzhiyun - anatop-min-voltage 73*4882a593Smuzhiyun - anatop-max-voltage 74*4882a593Smuzhiyun 75*4882a593SmuzhiyununevaluatedProperties: false 76*4882a593Smuzhiyun 77*4882a593Smuzhiyunexamples: 78*4882a593Smuzhiyun - | 79*4882a593Smuzhiyun regulator-vddpu { 80*4882a593Smuzhiyun compatible = "fsl,anatop-regulator"; 81*4882a593Smuzhiyun regulator-name = "vddpu"; 82*4882a593Smuzhiyun regulator-min-microvolt = <725000>; 83*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 84*4882a593Smuzhiyun regulator-always-on; 85*4882a593Smuzhiyun anatop-reg-offset = <0x140>; 86*4882a593Smuzhiyun anatop-vol-bit-shift = <9>; 87*4882a593Smuzhiyun anatop-vol-bit-width = <5>; 88*4882a593Smuzhiyun anatop-delay-reg-offset = <0x170>; 89*4882a593Smuzhiyun anatop-delay-bit-shift = <24>; 90*4882a593Smuzhiyun anatop-delay-bit-width = <2>; 91*4882a593Smuzhiyun anatop-min-bit-val = <1>; 92*4882a593Smuzhiyun anatop-min-voltage = <725000>; 93*4882a593Smuzhiyun anatop-max-voltage = <1300000>; 94*4882a593Smuzhiyun }; 95