1*4882a593SmuzhiyunTI SOC based PWM Subsystem 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Must be "ti,<soc>-pwmss". 5*4882a593Smuzhiyun for am33xx - compatible = "ti,am33xx-pwmss"; 6*4882a593Smuzhiyun for am4372 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 7*4882a593Smuzhiyun for dra746 - compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun- reg: physical base address and size of the registers map. 10*4882a593Smuzhiyun- address-cells: Specify the number of u32 entries needed in child nodes. 11*4882a593Smuzhiyun Should set to 1. 12*4882a593Smuzhiyun- size-cells: specify number of u32 entries needed to specify child nodes size 13*4882a593Smuzhiyun in reg property. Should set to 1. 14*4882a593Smuzhiyun- ranges: describes the address mapping of a memory-mapped bus. Should set to 15*4882a593Smuzhiyun physical address map of child's base address, physical address within 16*4882a593Smuzhiyun parent's address space and length of the address map. For am33xx, 17*4882a593Smuzhiyun 3 set of child register maps present, ECAP register space, EQEP 18*4882a593Smuzhiyun register space, EHRPWM register space. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunAlso child nodes should also populated under PWMSS DT node. 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunExample: 23*4882a593Smuzhiyunepwmss0: epwmss@48300000 { /* PWMSS for am33xx */ 24*4882a593Smuzhiyun compatible = "ti,am33xx-pwmss"; 25*4882a593Smuzhiyun reg = <0x48300000 0x10>; 26*4882a593Smuzhiyun ti,hwmods = "epwmss0"; 27*4882a593Smuzhiyun #address-cells = <1>; 28*4882a593Smuzhiyun #size-cells = <1>; 29*4882a593Smuzhiyun ranges = <0x48300100 0x48300100 0x80 /* ECAP */ 30*4882a593Smuzhiyun 0x48300180 0x48300180 0x80 /* EQEP */ 31*4882a593Smuzhiyun 0x48300200 0x48300200 0x80>; /* EHRPWM */ 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* child nodes go here */ 34*4882a593Smuzhiyun}; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunepwmss0: epwmss@48300000 { /* PWMSS for am4372 */ 37*4882a593Smuzhiyun compatible = "ti,am4372-pwmss","ti,am33xx-pwmss" 38*4882a593Smuzhiyun reg = <0x48300000 0x10>; 39*4882a593Smuzhiyun ti,hwmods = "epwmss0"; 40*4882a593Smuzhiyun #address-cells = <1>; 41*4882a593Smuzhiyun #size-cells = <1>; 42*4882a593Smuzhiyun ranges = <0x48300100 0x48300100 0x80 /* ECAP */ 43*4882a593Smuzhiyun 0x48300180 0x48300180 0x80 /* EQEP */ 44*4882a593Smuzhiyun 0x48300200 0x48300200 0x80>; /* EHRPWM */ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* child nodes go here */ 47*4882a593Smuzhiyun}; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyunepwmss0: epwmss@4843e000 { /* PWMSS for DRA7xx */ 50*4882a593Smuzhiyun compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss"; 51*4882a593Smuzhiyun reg = <0x4843e000 0x30>; 52*4882a593Smuzhiyun ti,hwmods = "epwmss0"; 53*4882a593Smuzhiyun #address-cells = <1>; 54*4882a593Smuzhiyun #size-cells = <1>; 55*4882a593Smuzhiyun ranges; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* child nodes go here */ 58*4882a593Smuzhiyun}; 59