1*4882a593SmuzhiyunTI SOC ECAP based APWM controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Must be "ti,<soc>-ecap". 5*4882a593Smuzhiyun for am33xx - compatible = "ti,am3352-ecap", "ti,am33xx-ecap"; 6*4882a593Smuzhiyun for am4372 - compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap"; 7*4882a593Smuzhiyun for da850 - compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap"; 8*4882a593Smuzhiyun for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap"; 9*4882a593Smuzhiyun for 66ak2g - compatible = "ti,k2g-ecap", "ti,am3352-ecap"; 10*4882a593Smuzhiyun for am654 - compatible = "ti,am654-ecap", "ti,am3352-ecap"; 11*4882a593Smuzhiyun- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of 12*4882a593Smuzhiyun the cells format. The PWM channel index ranges from 0 to 4. The only third 13*4882a593Smuzhiyun cell flag supported by this binding is PWM_POLARITY_INVERTED. 14*4882a593Smuzhiyun- reg: physical base address and size of the registers map. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunOptional properties: 17*4882a593Smuzhiyun- clocks: Handle to the ECAP's functional clock. 18*4882a593Smuzhiyun- clock-names: Must be set to "fck". 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun 22*4882a593Smuzhiyunecap0: ecap@48300100 { /* ECAP on am33xx */ 23*4882a593Smuzhiyun compatible = "ti,am3352-ecap", "ti,am33xx-ecap"; 24*4882a593Smuzhiyun #pwm-cells = <3>; 25*4882a593Smuzhiyun reg = <0x48300100 0x80>; 26*4882a593Smuzhiyun clocks = <&l4ls_gclk>; 27*4882a593Smuzhiyun clock-names = "fck"; 28*4882a593Smuzhiyun}; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyunecap0: ecap@48300100 { /* ECAP on am4372 */ 31*4882a593Smuzhiyun compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap"; 32*4882a593Smuzhiyun #pwm-cells = <3>; 33*4882a593Smuzhiyun reg = <0x48300100 0x80>; 34*4882a593Smuzhiyun ti,hwmods = "ecap0"; 35*4882a593Smuzhiyun clocks = <&l4ls_gclk>; 36*4882a593Smuzhiyun clock-names = "fck"; 37*4882a593Smuzhiyun}; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyunecap0: ecap@1f06000 { /* ECAP on da850 */ 40*4882a593Smuzhiyun compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap"; 41*4882a593Smuzhiyun #pwm-cells = <3>; 42*4882a593Smuzhiyun reg = <0x1f06000 0x80>; 43*4882a593Smuzhiyun}; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyunecap0: ecap@4843e100 { 46*4882a593Smuzhiyun compatible = "ti,dra746-ecap", "ti,am3352-ecap"; 47*4882a593Smuzhiyun #pwm-cells = <3>; 48*4882a593Smuzhiyun reg = <0x4843e100 0x80>; 49*4882a593Smuzhiyun clocks = <&l4_root_clk_div>; 50*4882a593Smuzhiyun clock-names = "fck"; 51*4882a593Smuzhiyun}; 52