1*4882a593SmuzhiyunSTMicroelectronics PWM driver bindings 2*4882a593Smuzhiyun-------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired parameters: 5*4882a593Smuzhiyun- compatible : "st,pwm" 6*4882a593Smuzhiyun- #pwm-cells : Number of cells used to specify a PWM. First cell 7*4882a593Smuzhiyun specifies the per-chip index of the PWM to use and the 8*4882a593Smuzhiyun second cell is the period in nanoseconds - fixed to 2 9*4882a593Smuzhiyun for STiH41x. 10*4882a593Smuzhiyun- reg : Physical base address and length of the controller's 11*4882a593Smuzhiyun registers. 12*4882a593Smuzhiyun- pinctrl-names: Set to "default". 13*4882a593Smuzhiyun- pinctrl-0: List of phandles pointing to pin configuration nodes 14*4882a593Smuzhiyun for PWM module. 15*4882a593Smuzhiyun For Pinctrl properties, please refer to [1]. 16*4882a593Smuzhiyun- clock-names: Valid entries are "pwm" and/or "capture". 17*4882a593Smuzhiyun- clocks: phandle of the clock used by the PWM module. 18*4882a593Smuzhiyun For Clk properties, please refer to [2]. 19*4882a593Smuzhiyun- interrupts: IRQ for the Capture device 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunOptional properties: 22*4882a593Smuzhiyun- st,pwm-num-chan: Number of available PWM channels. Default is 0. 23*4882a593Smuzhiyun- st,capture-num-chan: Number of available Capture channels. Default is 0. 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 26*4882a593Smuzhiyun[2] Documentation/devicetree/bindings/clock/clock-bindings.txt 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunExample: 29*4882a593Smuzhiyun 30*4882a593Smuzhiyunpwm1: pwm@fe510000 { 31*4882a593Smuzhiyun compatible = "st,pwm"; 32*4882a593Smuzhiyun reg = <0xfe510000 0x68>; 33*4882a593Smuzhiyun #pwm-cells = <2>; 34*4882a593Smuzhiyun pinctrl-names = "default"; 35*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm1_chan0_default 36*4882a593Smuzhiyun &pinctrl_pwm1_chan1_default 37*4882a593Smuzhiyun &pinctrl_pwm1_chan2_default 38*4882a593Smuzhiyun &pinctrl_pwm1_chan3_default>; 39*4882a593Smuzhiyun clocks = <&clk_sysin>; 40*4882a593Smuzhiyun clock-names = "pwm"; 41*4882a593Smuzhiyun st,pwm-num-chan = <4>; 42*4882a593Smuzhiyun st,capture-num-chan = <2>; 43*4882a593Smuzhiyun}; 44