xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Samsung SoC PWM timers
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Thierry Reding <thierry.reding@gmail.com>
11*4882a593Smuzhiyun  - Krzysztof Kozlowski <krzk@kernel.org>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundescription: |+
14*4882a593Smuzhiyun  Samsung SoCs contain PWM timer blocks which can be used for system clock source
15*4882a593Smuzhiyun  and clock event timers, as well as to drive SoC outputs with PWM signal. Each
16*4882a593Smuzhiyun  PWM timer block provides 5 PWM channels (not all of them can drive physical
17*4882a593Smuzhiyun  outputs - see SoC and board manual).
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun  Be aware that the clocksource driver supports only uniprocessor systems.
20*4882a593Smuzhiyun
21*4882a593Smuzhiyunproperties:
22*4882a593Smuzhiyun  compatible:
23*4882a593Smuzhiyun    enum:
24*4882a593Smuzhiyun      - samsung,s3c2410-pwm             # 16-bit, S3C24xx
25*4882a593Smuzhiyun      - samsung,s3c6400-pwm             # 32-bit, S3C64xx
26*4882a593Smuzhiyun      - samsung,s5p6440-pwm             # 32-bit, S5P64x0
27*4882a593Smuzhiyun      - samsung,s5pc100-pwm             # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs
28*4882a593Smuzhiyun      - samsung,exynos4210-pwm          # 32-bit, Exynos
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun  reg:
31*4882a593Smuzhiyun    maxItems: 1
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun  clocks:
34*4882a593Smuzhiyun    minItems: 1
35*4882a593Smuzhiyun    maxItems: 3
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun  clock-names:
38*4882a593Smuzhiyun    description: |
39*4882a593Smuzhiyun      Should contain all following required clock names:
40*4882a593Smuzhiyun      - "timers" - PWM base clock used to generate PWM signals,
41*4882a593Smuzhiyun      and any subset of following optional clock names:
42*4882a593Smuzhiyun      - "pwm-tclk0" - first external PWM clock source,
43*4882a593Smuzhiyun      - "pwm-tclk1" - second external PWM clock source.
44*4882a593Smuzhiyun      Note that not all IP variants allow using all external clock sources.
45*4882a593Smuzhiyun      Refer to SoC documentation to learn which clock source configurations
46*4882a593Smuzhiyun      are available.
47*4882a593Smuzhiyun    oneOf:
48*4882a593Smuzhiyun      - items:
49*4882a593Smuzhiyun          - const: timers
50*4882a593Smuzhiyun      - items:
51*4882a593Smuzhiyun          - const: timers
52*4882a593Smuzhiyun          - const: pwm-tclk0
53*4882a593Smuzhiyun      - items:
54*4882a593Smuzhiyun          - const: timers
55*4882a593Smuzhiyun          - const: pwm-tclk1
56*4882a593Smuzhiyun      - items:
57*4882a593Smuzhiyun          - const: timers
58*4882a593Smuzhiyun          - const: pwm-tclk0
59*4882a593Smuzhiyun          - const: pwm-tclk1
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun  interrupts:
62*4882a593Smuzhiyun    description:
63*4882a593Smuzhiyun      One interrupt per timer, starting at timer 0. Necessary only for SoCs which
64*4882a593Smuzhiyun      use PWM clocksource.
65*4882a593Smuzhiyun    minItems: 1
66*4882a593Smuzhiyun    maxItems: 5
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun  "#pwm-cells":
69*4882a593Smuzhiyun    description:
70*4882a593Smuzhiyun      The only third cell flag supported by this binding
71*4882a593Smuzhiyun      is PWM_POLARITY_INVERTED.
72*4882a593Smuzhiyun    const: 3
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun  samsung,pwm-outputs:
75*4882a593Smuzhiyun    description:
76*4882a593Smuzhiyun      A list of PWM channels used as PWM outputs on particular platform.
77*4882a593Smuzhiyun      It is an array of up to 5 elements being indices of PWM channels
78*4882a593Smuzhiyun      (from 0 to 4), the order does not matter.
79*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32-array
80*4882a593Smuzhiyun    uniqueItems: true
81*4882a593Smuzhiyun    items:
82*4882a593Smuzhiyun      minimum: 0
83*4882a593Smuzhiyun      maximum: 4
84*4882a593Smuzhiyun
85*4882a593Smuzhiyunrequired:
86*4882a593Smuzhiyun  - clocks
87*4882a593Smuzhiyun  - clock-names
88*4882a593Smuzhiyun  - compatible
89*4882a593Smuzhiyun  - "#pwm-cells"
90*4882a593Smuzhiyun  - reg
91*4882a593Smuzhiyun
92*4882a593SmuzhiyunadditionalProperties: false
93*4882a593Smuzhiyun
94*4882a593SmuzhiyunallOf:
95*4882a593Smuzhiyun  - $ref: pwm.yaml#
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun  - if:
98*4882a593Smuzhiyun      properties:
99*4882a593Smuzhiyun        compatible:
100*4882a593Smuzhiyun          contains:
101*4882a593Smuzhiyun            enum:
102*4882a593Smuzhiyun              - samsung,s3c2410-pwm
103*4882a593Smuzhiyun              - samsung,s3c6400-pwm
104*4882a593Smuzhiyun              - samsung,s5p6440-pwm
105*4882a593Smuzhiyun              - samsung,s5pc100-pwm
106*4882a593Smuzhiyun    then:
107*4882a593Smuzhiyun      required:
108*4882a593Smuzhiyun        - interrupts
109*4882a593Smuzhiyun
110*4882a593Smuzhiyunexamples:
111*4882a593Smuzhiyun  - |
112*4882a593Smuzhiyun    pwm@7f006000 {
113*4882a593Smuzhiyun        compatible = "samsung,s3c6400-pwm";
114*4882a593Smuzhiyun        reg = <0x7f006000 0x1000>;
115*4882a593Smuzhiyun        interrupt-parent = <&vic0>;
116*4882a593Smuzhiyun        interrupts = <23>, <24>, <25>, <27>, <28>;
117*4882a593Smuzhiyun        clocks = <&clock 67>;
118*4882a593Smuzhiyun        clock-names = "timers";
119*4882a593Smuzhiyun        samsung,pwm-outputs = <0>, <1>;
120*4882a593Smuzhiyun        #pwm-cells = <3>;
121*4882a593Smuzhiyun    };
122