1*4882a593SmuzhiyunDevice-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM driver 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Atmel HLCDC PWM is subdevice of the HLCDC MFD device. 4*4882a593SmuzhiyunSee ../mfd/atmel-hlcdc.txt for more details. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun - compatible: value should be one of the following: 8*4882a593Smuzhiyun "atmel,hlcdc-pwm" 9*4882a593Smuzhiyun - pinctr-names: the pin control state names. Should contain "default". 10*4882a593Smuzhiyun - pinctrl-0: should contain the pinctrl states described by pinctrl 11*4882a593Smuzhiyun default. 12*4882a593Smuzhiyun - #pwm-cells: should be set to 3. This PWM chip use the default 3 cells 13*4882a593Smuzhiyun bindings defined in pwm.yaml in this directory. 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunExample: 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun hlcdc: hlcdc@f0030000 { 18*4882a593Smuzhiyun compatible = "atmel,sama5d3-hlcdc"; 19*4882a593Smuzhiyun reg = <0xf0030000 0x2000>; 20*4882a593Smuzhiyun clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; 21*4882a593Smuzhiyun clock-names = "periph_clk","sys_clk", "slow_clk"; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun hlcdc_pwm: hlcdc-pwm { 24*4882a593Smuzhiyun compatible = "atmel,hlcdc-pwm"; 25*4882a593Smuzhiyun pinctrl-names = "default"; 26*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_lcd_pwm>; 27*4882a593Smuzhiyun #pwm-cells = <3>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun }; 30