1*4882a593Smuzhiyun* Chipselect/Local Bus 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunProperties: 4*4882a593Smuzhiyun- name : Should be localbus 5*4882a593Smuzhiyun- #address-cells : Should be either two or three. The first cell is the 6*4882a593Smuzhiyun chipselect number, and the remaining cells are the 7*4882a593Smuzhiyun offset into the chipselect. 8*4882a593Smuzhiyun- #size-cells : Either one or two, depending on how large each chipselect 9*4882a593Smuzhiyun can be. 10*4882a593Smuzhiyun- ranges : Each range corresponds to a single chipselect, and cover 11*4882a593Smuzhiyun the entire access window as configured. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExample: 14*4882a593Smuzhiyun localbus@f0010100 { 15*4882a593Smuzhiyun compatible = "fsl,mpc8272-localbus", 16*4882a593Smuzhiyun "fsl,pq2-localbus"; 17*4882a593Smuzhiyun #address-cells = <2>; 18*4882a593Smuzhiyun #size-cells = <1>; 19*4882a593Smuzhiyun reg = <0xf0010100 0x40>; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun ranges = <0x0 0x0 0xfe000000 0x02000000 22*4882a593Smuzhiyun 0x1 0x0 0xf4500000 0x00008000 23*4882a593Smuzhiyun 0x2 0x0 0xfd810000 0x00010000>; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun flash@0,0 { 26*4882a593Smuzhiyun compatible = "jedec-flash"; 27*4882a593Smuzhiyun reg = <0x0 0x0 0x2000000>; 28*4882a593Smuzhiyun bank-width = <4>; 29*4882a593Smuzhiyun device-width = <1>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun board-control@1,0 { 33*4882a593Smuzhiyun reg = <0x1 0x0 0x20>; 34*4882a593Smuzhiyun compatible = "fsl,mpc8272ads-bcsr"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun simple-periph@2,0 { 38*4882a593Smuzhiyun compatible = "fsl,elbc-gpcm-uio"; 39*4882a593Smuzhiyun reg = <0x2 0x0 0x10000>; 40*4882a593Smuzhiyun elbc-gpcm-br = <0xfd810800>; 41*4882a593Smuzhiyun elbc-gpcm-or = <0xffff09f7>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44