1*4882a593Smuzhiyun* Freescale Display Interface Unit 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Freescale DIU is a LCD controller, with proper hardware, it can also 4*4882a593Smuzhiyundrive DVI monitors. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun- compatible : should be "fsl,diu" or "fsl,mpc5121-diu". 8*4882a593Smuzhiyun- reg : should contain at least address and length of the DIU register 9*4882a593Smuzhiyun set. 10*4882a593Smuzhiyun- interrupts : one DIU interrupt should be described here. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunOptional properties: 13*4882a593Smuzhiyun- edid : verbatim EDID data block describing attached display. 14*4882a593Smuzhiyun Data from the detailed timing descriptor will be used to 15*4882a593Smuzhiyun program the display controller. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExample (MPC8610HPCD): 18*4882a593Smuzhiyun display@2c000 { 19*4882a593Smuzhiyun compatible = "fsl,diu"; 20*4882a593Smuzhiyun reg = <0x2c000 100>; 21*4882a593Smuzhiyun interrupts = <72 2>; 22*4882a593Smuzhiyun interrupt-parent = <&mpic>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunExample for MPC5121: 26*4882a593Smuzhiyun display@2100 { 27*4882a593Smuzhiyun compatible = "fsl,mpc5121-diu"; 28*4882a593Smuzhiyun reg = <0x2100 0x100>; 29*4882a593Smuzhiyun interrupts = <64 0x8>; 30*4882a593Smuzhiyun interrupt-parent = <&ipic>; 31*4882a593Smuzhiyun edid = [edid-data]; 32*4882a593Smuzhiyun }; 33