xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/power/renesas,apmu.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/power/renesas,apmu.yaml#"
5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Renesas Advanced Power Management Unit
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Geert Uytterhoeven <geert+renesas@glider.be>
11*4882a593Smuzhiyun  - Magnus Damm <magnus.damm@gmail.com>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundescription:
14*4882a593Smuzhiyun  Renesas R-Car Gen2 and RZ/G1 SoCs utilize one or more APMU hardware units for
15*4882a593Smuzhiyun  CPU core power domain control including SMP boot and CPU Hotplug.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyunproperties:
18*4882a593Smuzhiyun  compatible:
19*4882a593Smuzhiyun    items:
20*4882a593Smuzhiyun      - enum:
21*4882a593Smuzhiyun          - renesas,r8a7742-apmu  # RZ/G1H
22*4882a593Smuzhiyun          - renesas,r8a7743-apmu  # RZ/G1M
23*4882a593Smuzhiyun          - renesas,r8a7744-apmu  # RZ/G1N
24*4882a593Smuzhiyun          - renesas,r8a7745-apmu  # RZ/G1E
25*4882a593Smuzhiyun          - renesas,r8a77470-apmu # RZ/G1C
26*4882a593Smuzhiyun          - renesas,r8a7790-apmu  # R-Car H2
27*4882a593Smuzhiyun          - renesas,r8a7791-apmu  # R-Car M2-W
28*4882a593Smuzhiyun          - renesas,r8a7792-apmu  # R-Car V2H
29*4882a593Smuzhiyun          - renesas,r8a7793-apmu  # R-Car M2-N
30*4882a593Smuzhiyun          - renesas,r8a7794-apmu  # R-Car E2
31*4882a593Smuzhiyun      - const: renesas,apmu
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun  reg:
34*4882a593Smuzhiyun    maxItems: 1
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun  cpus:
37*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/phandle-array
38*4882a593Smuzhiyun    description: |
39*4882a593Smuzhiyun      Array of phandles pointing to CPU cores, which should match the order of
40*4882a593Smuzhiyun      CPU cores used by the WUPCR and PSTR registers in the Advanced Power
41*4882a593Smuzhiyun      Management Unit section of the device's datasheet.
42*4882a593Smuzhiyun
43*4882a593Smuzhiyunrequired:
44*4882a593Smuzhiyun  - compatible
45*4882a593Smuzhiyun  - reg
46*4882a593Smuzhiyun  - cpus
47*4882a593Smuzhiyun
48*4882a593SmuzhiyunadditionalProperties: false
49*4882a593Smuzhiyun
50*4882a593Smuzhiyunexamples:
51*4882a593Smuzhiyun  - |
52*4882a593Smuzhiyun    apmu@e6152000 {
53*4882a593Smuzhiyun            compatible = "renesas,r8a7791-apmu", "renesas,apmu";
54*4882a593Smuzhiyun            reg = <0xe6152000 0x188>;
55*4882a593Smuzhiyun            cpus = <&cpu0 &cpu1>;
56*4882a593Smuzhiyun    };
57