xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/pinctrl/toshiba,visconti-pinctrl.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Toshiba Visconti TMPV770x pin mux/config controller
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyundescription:
13*4882a593Smuzhiyun  Toshiba's Visconti ARM SoC a pin mux/config controller.
14*4882a593Smuzhiyun
15*4882a593Smuzhiyunproperties:
16*4882a593Smuzhiyun  compatible:
17*4882a593Smuzhiyun    enum:
18*4882a593Smuzhiyun      - toshiba,tmpv7708-pinctrl
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun  reg:
21*4882a593Smuzhiyun    maxItems: 1
22*4882a593Smuzhiyun
23*4882a593Smuzhiyunrequired:
24*4882a593Smuzhiyun  - compatible
25*4882a593Smuzhiyun  - reg
26*4882a593Smuzhiyun
27*4882a593SmuzhiyunpatternProperties:
28*4882a593Smuzhiyun  '-pins$':
29*4882a593Smuzhiyun    type: object
30*4882a593Smuzhiyun    description: |
31*4882a593Smuzhiyun      A pinctrl node should contain at least one subnodes representing the
32*4882a593Smuzhiyun      pinctrl groups available on the machine. Each subnode will list the
33*4882a593Smuzhiyun      pins it needs, and how they should be configured, with regard to muxer
34*4882a593Smuzhiyun      configuration, pullups, drive strength.
35*4882a593Smuzhiyun    $ref: "pinmux-node.yaml"
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun    properties:
38*4882a593Smuzhiyun      function:
39*4882a593Smuzhiyun        description:
40*4882a593Smuzhiyun          Function to mux.
41*4882a593Smuzhiyun        $ref: "/schemas/types.yaml#/definitions/string"
42*4882a593Smuzhiyun        enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i2c5, i2c6, i2c7, i2c8,
43*4882a593Smuzhiyun               spi0, spi1, spi2, spi3, spi4, spi5, spi6,
44*4882a593Smuzhiyun               uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in]
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun      groups:
47*4882a593Smuzhiyun        description:
48*4882a593Smuzhiyun          Name of the pin group to use for the functions.
49*4882a593Smuzhiyun        $ref: "/schemas/types.yaml#/definitions/string"
50*4882a593Smuzhiyun        enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp,
51*4882a593Smuzhiyun               i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp,
52*4882a593Smuzhiyun               spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp,
53*4882a593Smuzhiyun               spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp,
54*4882a593Smuzhiyun               uart0_grp, uart1_grp, uart2_grp, uart3_grp,
55*4882a593Smuzhiyun               pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp,
56*4882a593Smuzhiyun               pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp,
57*4882a593Smuzhiyun               pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp,
58*4882a593Smuzhiyun               pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp,
59*4882a593Smuzhiyun               pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp,
60*4882a593Smuzhiyun               pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp]
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun      drive-strength:
63*4882a593Smuzhiyun        enum: [2, 4, 6, 8, 16, 24, 32]
64*4882a593Smuzhiyun        default: 2
65*4882a593Smuzhiyun        description:
66*4882a593Smuzhiyun          Selects the drive strength for the specified pins, in mA.
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun      bias-pull-up: true
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun      bias-pull-down: true
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun      bias-disable: true
73*4882a593Smuzhiyun
74*4882a593SmuzhiyunadditionalProperties: false
75*4882a593Smuzhiyun
76*4882a593Smuzhiyunexamples:
77*4882a593Smuzhiyun  # Pinmux controller node
78*4882a593Smuzhiyun  - |
79*4882a593Smuzhiyun    soc {
80*4882a593Smuzhiyun        #address-cells = <2>;
81*4882a593Smuzhiyun        #size-cells = <2>;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun        pmux: pmux@24190000 {
84*4882a593Smuzhiyun            compatible = "toshiba,tmpv7708-pinctrl";
85*4882a593Smuzhiyun            reg = <0 0x24190000 0 0x10000>;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun            spi0_pins: spi0-pins {
88*4882a593Smuzhiyun                function = "spi0";
89*4882a593Smuzhiyun                groups = "spi0_grp";
90*4882a593Smuzhiyun            };
91*4882a593Smuzhiyun        };
92*4882a593Smuzhiyun    };
93