1*4882a593SmuzhiyunST Ericsson Nomadik pinmux controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl", 5*4882a593Smuzhiyun "stericsson,stn8815-pinctrl" 6*4882a593Smuzhiyun- nomadik-gpio-chips: array of phandles to the corresponding GPIO chips 7*4882a593Smuzhiyun (these have the register ranges used by the pin controller). 8*4882a593Smuzhiyun- prcm: phandle to the PRCMU managing the back end of this pin controller 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunPlease refer to pinctrl-bindings.txt in this directory for details of the 11*4882a593Smuzhiyuncommon pinctrl bindings used by client devices, including the meaning of the 12*4882a593Smuzhiyunphrase "pin configuration node". 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunST Ericsson's pin configuration nodes act as a container for an arbitrary number of 15*4882a593Smuzhiyunsubnodes. Each of these subnodes represents some desired configuration for a 16*4882a593Smuzhiyunpin, a group, or a list of pins or groups. This configuration can include the 17*4882a593Smuzhiyunmux function to select on those pin(s)/group(s), and various pin configuration 18*4882a593Smuzhiyunparameters, such as input, output, pull up, pull down... 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunThe name of each subnode is not important; all subnodes should be enumerated 21*4882a593Smuzhiyunand processed purely based on their content. The subnodes use the generic 22*4882a593Smuzhiyunpin multiplexing node layout from the standard pin control bindings 23*4882a593Smuzhiyun(see pinctrl-bindings.txt): 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunRequired pin multiplexing subnode properties: 26*4882a593Smuzhiyun- function: A string containing the name of the function to mux to the 27*4882a593Smuzhiyun pin or group. 28*4882a593Smuzhiyun- groups : An array of strings. Each string contains the name of a pin 29*4882a593Smuzhiyun group that will be combined with the function to form a multiplexing 30*4882a593Smuzhiyun set-up. 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunRequired pin configuration subnode properties: 33*4882a593Smuzhiyun- pins: A string array describing the pins affected by the configuration 34*4882a593Smuzhiyun in the node. 35*4882a593Smuzhiyun- ste,config: Handle of pin configuration node 36*4882a593Smuzhiyun (e.g. ste,config = <&slpm_in_wkup_pdis>) 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun- ste,input : <0/1/2> 39*4882a593Smuzhiyun 0: input with no pull 40*4882a593Smuzhiyun 1: input with pull up, 41*4882a593Smuzhiyun 2: input with pull down, 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun- ste,output: <0/1/2> 44*4882a593Smuzhiyun 0: output low, 45*4882a593Smuzhiyun 1: output high, 46*4882a593Smuzhiyun 2: output (value is not specified). 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun- ste,sleep: <0/1> 49*4882a593Smuzhiyun 0: sleep mode disable, 50*4882a593Smuzhiyun 1: sleep mode enable. 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun- ste,sleep-input: <0/1/2/3> 53*4882a593Smuzhiyun 0: sleep input with no pull, 54*4882a593Smuzhiyun 1: sleep input with pull up, 55*4882a593Smuzhiyun 2: sleep input with pull down. 56*4882a593Smuzhiyun 3: sleep input and keep last input configuration (no pull, pull up or pull down). 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun- ste,sleep-output: <0/1/2> 59*4882a593Smuzhiyun 0: sleep output low, 60*4882a593Smuzhiyun 1: sleep output high, 61*4882a593Smuzhiyun 2: sleep output (value is not specified). 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun- ste,sleep-gpio: <0/1> 64*4882a593Smuzhiyun 0: disable sleep gpio mode, 65*4882a593Smuzhiyun 1: enable sleep gpio mode. 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun- ste,sleep-wakeup: <0/1> 68*4882a593Smuzhiyun 0: wake-up detection enabled, 69*4882a593Smuzhiyun 1: wake-up detection disabled. 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun- ste,sleep-pull-disable: <0/1> 72*4882a593Smuzhiyun 0: GPIO pull-up or pull-down resistor is enabled, when pin is an input, 73*4882a593Smuzhiyun 1: GPIO pull-up and pull-down resistor are disabled. 74*4882a593Smuzhiyun 75*4882a593SmuzhiyunExample board file extract: 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun pinctrl@80157000 { 78*4882a593Smuzhiyun compatible = "stericsson,db8500-pinctrl"; 79*4882a593Smuzhiyun nomadik-gpio-chips = <&gpio0>, <&gpio1>, <&gpio2>, <&gpio3>; 80*4882a593Smuzhiyun prcm = <&prcmu>; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun pinctrl-names = "default"; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun slpm_in_wkup_pdis: slpm_in_wkup_pdis { 85*4882a593Smuzhiyun ste,sleep = <1>; 86*4882a593Smuzhiyun ste,sleep-input = <3>; 87*4882a593Smuzhiyun ste,sleep-wakeup = <1>; 88*4882a593Smuzhiyun ste,sleep-pull-disable = <0>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun slpm_out_hi_wkup_pdis: slpm_out_hi_wkup_pdis { 92*4882a593Smuzhiyun ste,sleep = <1>; 93*4882a593Smuzhiyun ste,sleep-output = <1>; 94*4882a593Smuzhiyun ste,sleep-wakeup = <1>; 95*4882a593Smuzhiyun ste,sleep-pull-disable = <0>; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun slpm_out_wkup_pdis: slpm_out_wkup_pdis { 99*4882a593Smuzhiyun ste,sleep = <1>; 100*4882a593Smuzhiyun ste,sleep-output = <2>; 101*4882a593Smuzhiyun ste,sleep-wakeup = <1>; 102*4882a593Smuzhiyun ste,sleep-pull-disable = <0>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun uart0 { 106*4882a593Smuzhiyun uart0_default_mux: uart0_mux { 107*4882a593Smuzhiyun u0_default_mux { 108*4882a593Smuzhiyun function = "u0"; 109*4882a593Smuzhiyun pins = "u0_a_1"; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun uart0_default_mode: uart0_default { 113*4882a593Smuzhiyun uart0_default_cfg1 { 114*4882a593Smuzhiyun pins = "GPIO0", "GPIO2"; 115*4882a593Smuzhiyun ste,input = <1>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun uart0_default_cfg2 { 119*4882a593Smuzhiyun pins = "GPIO1", "GPIO3"; 120*4882a593Smuzhiyun ste,output = <1>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun uart0_sleep_mode: uart0_sleep { 124*4882a593Smuzhiyun uart0_sleep_cfg1 { 125*4882a593Smuzhiyun pins = "GPIO0", "GPIO2"; 126*4882a593Smuzhiyun ste,config = <&slpm_in_wkup_pdis>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun uart0_sleep_cfg2 { 129*4882a593Smuzhiyun pins = "GPIO1"; 130*4882a593Smuzhiyun ste,config = <&slpm_out_hi_wkup_pdis>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun uart0_sleep_cfg3 { 133*4882a593Smuzhiyun pins = "GPIO3"; 134*4882a593Smuzhiyun ste,config = <&slpm_out_wkup_pdis>; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun uart@80120000 { 141*4882a593Smuzhiyun compatible = "arm,pl011", "arm,primecell"; 142*4882a593Smuzhiyun reg = <0x80120000 0x1000>; 143*4882a593Smuzhiyun interrupts = <0 11 0x4>; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun pinctrl-names = "default","sleep"; 146*4882a593Smuzhiyun pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>; 147*4882a593Smuzhiyun pinctrl-1 = <&uart0_sleep_mode>; 148*4882a593Smuzhiyun }; 149