1*4882a593SmuzhiyunQualcomm MSM8960 TLMM block 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis binding describes the Top Level Mode Multiplexer block found in the 4*4882a593SmuzhiyunMSM8960 platform. 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun- compatible: 7*4882a593Smuzhiyun Usage: required 8*4882a593Smuzhiyun Value type: <string> 9*4882a593Smuzhiyun Definition: must be "qcom,msm8960-pinctrl" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun- reg: 12*4882a593Smuzhiyun Usage: required 13*4882a593Smuzhiyun Value type: <prop-encoded-array> 14*4882a593Smuzhiyun Definition: the base address and size of the TLMM register space. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun- interrupts: 17*4882a593Smuzhiyun Usage: required 18*4882a593Smuzhiyun Value type: <prop-encoded-array> 19*4882a593Smuzhiyun Definition: should specify the TLMM summary IRQ. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun- interrupt-controller: 22*4882a593Smuzhiyun Usage: required 23*4882a593Smuzhiyun Value type: <none> 24*4882a593Smuzhiyun Definition: identifies this node as an interrupt controller 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun- #interrupt-cells: 27*4882a593Smuzhiyun Usage: required 28*4882a593Smuzhiyun Value type: <u32> 29*4882a593Smuzhiyun Definition: must be 2. Specifying the pin number and flags, as defined 30*4882a593Smuzhiyun in <dt-bindings/interrupt-controller/irq.h> 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun- gpio-controller: 33*4882a593Smuzhiyun Usage: required 34*4882a593Smuzhiyun Value type: <none> 35*4882a593Smuzhiyun Definition: identifies this node as a gpio controller 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun- #gpio-cells: 38*4882a593Smuzhiyun Usage: required 39*4882a593Smuzhiyun Value type: <u32> 40*4882a593Smuzhiyun Definition: must be 2. Specifying the pin number and flags, as defined 41*4882a593Smuzhiyun in <dt-bindings/gpio/gpio.h> 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun- gpio-ranges: 44*4882a593Smuzhiyun Usage: required 45*4882a593Smuzhiyun Definition: see ../gpio/gpio.txt 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun- gpio-reserved-ranges: 48*4882a593Smuzhiyun Usage: optional 49*4882a593Smuzhiyun Definition: see ../gpio/gpio.txt 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunPlease refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for 52*4882a593Smuzhiyuna general description of GPIO and interrupt bindings. 53*4882a593Smuzhiyun 54*4882a593SmuzhiyunPlease refer to pinctrl-bindings.txt in this directory for details of the 55*4882a593Smuzhiyuncommon pinctrl bindings used by client devices, including the meaning of the 56*4882a593Smuzhiyunphrase "pin configuration node". 57*4882a593Smuzhiyun 58*4882a593SmuzhiyunThe pin configuration nodes act as a container for an arbitrary number of 59*4882a593Smuzhiyunsubnodes. Each of these subnodes represents some desired configuration for a 60*4882a593Smuzhiyunpin, a group, or a list of pins or groups. This configuration can include the 61*4882a593Smuzhiyunmux function to select on those pin(s)/group(s), and various pin configuration 62*4882a593Smuzhiyunparameters, such as pull-up, drive strength, etc. 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunPIN CONFIGURATION NODES: 66*4882a593Smuzhiyun 67*4882a593SmuzhiyunThe name of each subnode is not important; all subnodes should be enumerated 68*4882a593Smuzhiyunand processed purely based on their content. 69*4882a593Smuzhiyun 70*4882a593SmuzhiyunEach subnode only affects those parameters that are explicitly listed. In 71*4882a593Smuzhiyunother words, a subnode that lists a mux function but no pin configuration 72*4882a593Smuzhiyunparameters implies no information about any pin configuration parameters. 73*4882a593SmuzhiyunSimilarly, a pin subnode that describes a pullup parameter implies no 74*4882a593Smuzhiyuninformation about e.g. the mux function. 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun 77*4882a593SmuzhiyunThe following generic properties as defined in pinctrl-bindings.txt are valid 78*4882a593Smuzhiyunto specify in a pin configuration subnode: 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun- pins: 81*4882a593Smuzhiyun Usage: required 82*4882a593Smuzhiyun Value type: <string-array> 83*4882a593Smuzhiyun Definition: List of gpio pins affected by the properties specified in 84*4882a593Smuzhiyun this subnode. Valid pins are: 85*4882a593Smuzhiyun gpio0-gpio151, 86*4882a593Smuzhiyun sdc1_clk, 87*4882a593Smuzhiyun sdc1_cmd, 88*4882a593Smuzhiyun sdc1_data 89*4882a593Smuzhiyun sdc3_clk, 90*4882a593Smuzhiyun sdc3_cmd, 91*4882a593Smuzhiyun sdc3_data 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun- function: 94*4882a593Smuzhiyun Usage: required 95*4882a593Smuzhiyun Value type: <string> 96*4882a593Smuzhiyun Definition: Specify the alternative function to be configured for the 97*4882a593Smuzhiyun specified pins. Functions are only valid for gpio pins. 98*4882a593Smuzhiyun Valid values are: 99*4882a593Smuzhiyun audio_pcm, bt, cam_mclk0, cam_mclk1, cam_mclk2, 100*4882a593Smuzhiyun codec_mic_i2s, codec_spkr_i2s, ext_gps, fm, gps_blanking, 101*4882a593Smuzhiyun gps_pps_in, gps_pps_out, gp_clk_0a, gp_clk_0b, gp_clk_1a, 102*4882a593Smuzhiyun gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gp_pdm_0a, 103*4882a593Smuzhiyun gp_pdm_0b, gp_pdm_1a, gp_pdm_1b, gp_pdm_2a, gp_pdm_2b, gpio, 104*4882a593Smuzhiyun gsbi1, gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n, 105*4882a593Smuzhiyun gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n, 106*4882a593Smuzhiyun gsbi2_spi_cs3_n, gsbi3, gsbi4, gsbi4_3d_cam_i2c_l, 107*4882a593Smuzhiyun gsbi4_3d_cam_i2c_r, gsbi5, gsbi5_3d_cam_i2c_l, 108*4882a593Smuzhiyun gsbi5_3d_cam_i2c_r, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, 109*4882a593Smuzhiyun gsbi11, gsbi11_spi_cs1a_n, gsbi11_spi_cs1b_n, 110*4882a593Smuzhiyun gsbi11_spi_cs2a_n, gsbi11_spi_cs2b_n, gsbi11_spi_cs3_n, 111*4882a593Smuzhiyun gsbi12, hdmi_cec, hdmi_ddc_clock, hdmi_ddc_data, 112*4882a593Smuzhiyun hdmi_hot_plug_detect, hsic, mdp_vsync, mi2s, mic_i2s, 113*4882a593Smuzhiyun pmb_clk, pmb_ext_ctrl, ps_hold, rpm_wdog, sdc2, sdc4, sdc5, 114*4882a593Smuzhiyun slimbus1, slimbus2, spkr_i2s, ssbi1, ssbi2, ssbi_ext_gps, 115*4882a593Smuzhiyun ssbi_pmic2, ssbi_qpa1, ssbi_ts, tsif1, tsif2, ts_eoc, 116*4882a593Smuzhiyun usb_fs1, usb_fs1_oe, usb_fs1_oe_n, usb_fs2, usb_fs2_oe, 117*4882a593Smuzhiyun usb_fs2_oe_n, vfe_camif_timer1_a, vfe_camif_timer1_b, 118*4882a593Smuzhiyun vfe_camif_timer2, vfe_camif_timer3_a, vfe_camif_timer3_b, 119*4882a593Smuzhiyun vfe_camif_timer4_a, vfe_camif_timer4_b, vfe_camif_timer4_c, 120*4882a593Smuzhiyun vfe_camif_timer5_a, vfe_camif_timer5_b, vfe_camif_timer6_a, 121*4882a593Smuzhiyun vfe_camif_timer6_b, vfe_camif_timer6_c, vfe_camif_timer7_a, 122*4882a593Smuzhiyun vfe_camif_timer7_b, vfe_camif_timer7_c, wlan 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun- bias-disable: 125*4882a593Smuzhiyun Usage: optional 126*4882a593Smuzhiyun Value type: <none> 127*4882a593Smuzhiyun Definition: The specified pins should be configured as no pull. 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun- bias-pull-down: 130*4882a593Smuzhiyun Usage: optional 131*4882a593Smuzhiyun Value type: <none> 132*4882a593Smuzhiyun Definition: The specified pins should be configured as pull down. 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun- bias-pull-up: 135*4882a593Smuzhiyun Usage: optional 136*4882a593Smuzhiyun Value type: <none> 137*4882a593Smuzhiyun Definition: The specified pins should be configured as pull up. 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun- output-high: 140*4882a593Smuzhiyun Usage: optional 141*4882a593Smuzhiyun Value type: <none> 142*4882a593Smuzhiyun Definition: The specified pins are configured in output mode, driven 143*4882a593Smuzhiyun high. 144*4882a593Smuzhiyun Not valid for sdc pins. 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun- output-low: 147*4882a593Smuzhiyun Usage: optional 148*4882a593Smuzhiyun Value type: <none> 149*4882a593Smuzhiyun Definition: The specified pins are configured in output mode, driven 150*4882a593Smuzhiyun low. 151*4882a593Smuzhiyun Not valid for sdc pins. 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun- drive-strength: 154*4882a593Smuzhiyun Usage: optional 155*4882a593Smuzhiyun Value type: <u32> 156*4882a593Smuzhiyun Definition: Selects the drive strength for the specified pins, in mA. 157*4882a593Smuzhiyun Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16 158*4882a593Smuzhiyun 159*4882a593SmuzhiyunExample: 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun msmgpio: pinctrl@800000 { 162*4882a593Smuzhiyun compatible = "qcom,msm8960-pinctrl"; 163*4882a593Smuzhiyun reg = <0x800000 0x4000>; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun gpio-controller; 166*4882a593Smuzhiyun #gpio-cells = <2>; 167*4882a593Smuzhiyun gpio-ranges = <&msmgpio 0 0 152>; 168*4882a593Smuzhiyun interrupt-controller; 169*4882a593Smuzhiyun #interrupt-cells = <2>; 170*4882a593Smuzhiyun interrupts = <0 16 0x4>; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun gsbi8_uart: gsbi8-uart { 173*4882a593Smuzhiyun mux { 174*4882a593Smuzhiyun pins = "gpio34", "gpio35"; 175*4882a593Smuzhiyun function = "gsbi8"; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun tx { 179*4882a593Smuzhiyun pins = "gpio34"; 180*4882a593Smuzhiyun drive-strength = <4>; 181*4882a593Smuzhiyun bias-disable; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun rx { 185*4882a593Smuzhiyun pins = "gpio35"; 186*4882a593Smuzhiyun drive-strength = <2>; 187*4882a593Smuzhiyun bias-pull-up; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun }; 191