xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/pinctrl/qcom,msm8226-pinctrl.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Qualcomm Technologies, Inc. MSM8226 TLMM block
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Bjorn Andersson <bjorn.andersson@linaro.org>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyundescription: |
13*4882a593Smuzhiyun  This binding describes the Top Level Mode Multiplexer block found in the
14*4882a593Smuzhiyun  MSM8226 platform.
15*4882a593Smuzhiyun
16*4882a593Smuzhiyunproperties:
17*4882a593Smuzhiyun  compatible:
18*4882a593Smuzhiyun    const: qcom,msm8226-pinctrl
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun  reg:
21*4882a593Smuzhiyun    description: Specifies the base address and size of the TLMM register space
22*4882a593Smuzhiyun    maxItems: 1
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun  interrupts:
25*4882a593Smuzhiyun    description: Specifies the TLMM summary IRQ
26*4882a593Smuzhiyun    maxItems: 1
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun  interrupt-controller: true
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun  '#interrupt-cells':
31*4882a593Smuzhiyun    description: Specifies the PIN numbers and Flags, as defined in
32*4882a593Smuzhiyun      include/dt-bindings/interrupt-controller/irq.h
33*4882a593Smuzhiyun    const: 2
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun  gpio-controller: true
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun  '#gpio-cells':
38*4882a593Smuzhiyun    description: Specifying the pin number and flags, as defined in
39*4882a593Smuzhiyun      include/dt-bindings/gpio/gpio.h
40*4882a593Smuzhiyun    const: 2
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun  gpio-ranges:
43*4882a593Smuzhiyun    maxItems: 1
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun  gpio-reserved-ranges:
46*4882a593Smuzhiyun    maxItems: 1
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun#PIN CONFIGURATION NODES
49*4882a593SmuzhiyunpatternProperties:
50*4882a593Smuzhiyun  '-pins$':
51*4882a593Smuzhiyun    type: object
52*4882a593Smuzhiyun    description:
53*4882a593Smuzhiyun      Pinctrl node's client devices use subnodes for desired pin configuration.
54*4882a593Smuzhiyun      Client device subnodes use below standard properties.
55*4882a593Smuzhiyun    $ref: "/schemas/pinctrl/pincfg-node.yaml"
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun    properties:
58*4882a593Smuzhiyun      pins:
59*4882a593Smuzhiyun        description:
60*4882a593Smuzhiyun          List of gpio pins affected by the properties specified in this
61*4882a593Smuzhiyun          subnode.
62*4882a593Smuzhiyun        items:
63*4882a593Smuzhiyun          oneOf:
64*4882a593Smuzhiyun            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
65*4882a593Smuzhiyun            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
66*4882a593Smuzhiyun        minItems: 1
67*4882a593Smuzhiyun        maxItems: 36
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun      function:
70*4882a593Smuzhiyun        description:
71*4882a593Smuzhiyun          Specify the alternative function to be configured for the specified
72*4882a593Smuzhiyun          pins. Functions are only valid for gpio pins.
73*4882a593Smuzhiyun        enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5,
74*4882a593Smuzhiyun                blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1,
75*4882a593Smuzhiyun                blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,
76*4882a593Smuzhiyun                blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ]
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun      drive-strength:
79*4882a593Smuzhiyun        enum: [2, 4, 6, 8, 10, 12, 14, 16]
80*4882a593Smuzhiyun        default: 2
81*4882a593Smuzhiyun        description:
82*4882a593Smuzhiyun          Selects the drive strength for the specified pins, in mA.
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun      bias-pull-down: true
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun      bias-pull-up: true
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun      bias-disable: true
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun      output-high: true
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun      output-low: true
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun    required:
95*4882a593Smuzhiyun      - pins
96*4882a593Smuzhiyun      - function
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun    additionalProperties: false
99*4882a593Smuzhiyun
100*4882a593Smuzhiyunrequired:
101*4882a593Smuzhiyun  - compatible
102*4882a593Smuzhiyun  - reg
103*4882a593Smuzhiyun  - interrupts
104*4882a593Smuzhiyun  - interrupt-controller
105*4882a593Smuzhiyun  - '#interrupt-cells'
106*4882a593Smuzhiyun  - gpio-controller
107*4882a593Smuzhiyun  - '#gpio-cells'
108*4882a593Smuzhiyun  - gpio-ranges
109*4882a593Smuzhiyun
110*4882a593SmuzhiyunadditionalProperties: false
111*4882a593Smuzhiyun
112*4882a593Smuzhiyunexamples:
113*4882a593Smuzhiyun  - |
114*4882a593Smuzhiyun        #include <dt-bindings/interrupt-controller/arm-gic.h>
115*4882a593Smuzhiyun        msmgpio: pinctrl@fd510000 {
116*4882a593Smuzhiyun                compatible = "qcom,msm8226-pinctrl";
117*4882a593Smuzhiyun                reg = <0xfd510000 0x4000>;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun                gpio-controller;
120*4882a593Smuzhiyun                #gpio-cells = <2>;
121*4882a593Smuzhiyun                gpio-ranges = <&msmgpio 0 0 117>;
122*4882a593Smuzhiyun                interrupt-controller;
123*4882a593Smuzhiyun                #interrupt-cells = <2>;
124*4882a593Smuzhiyun                interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun                serial-pins {
127*4882a593Smuzhiyun                        pins = "gpio8", "gpio9";
128*4882a593Smuzhiyun                        function = "blsp_uart3";
129*4882a593Smuzhiyun                        drive-strength = <8>;
130*4882a593Smuzhiyun                        bias-disable;
131*4882a593Smuzhiyun                };
132*4882a593Smuzhiyun        };
133