xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/oxnas,pinctrl.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* Oxford Semiconductor OXNAS SoC Family Pin Controller
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunPlease refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
4*4882a593Smuzhiyun../interrupt-controller/interrupts.txt for generic information regarding
5*4882a593Smuzhiyunpin controller, GPIO, and interrupt bindings.
6*4882a593Smuzhiyun
7*4882a593SmuzhiyunOXNAS 'pin configuration node' is a node of a group of pins which can be
8*4882a593Smuzhiyunused for a specific device or function. This node represents configurations of
9*4882a593Smuzhiyunpins, optional function, and optional mux related configuration.
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunRequired properties for pin controller node:
12*4882a593Smuzhiyun - compatible: "oxsemi,ox810se-pinctrl" or "oxsemi,ox820-pinctrl"
13*4882a593Smuzhiyun - oxsemi,sys-ctrl: a phandle to the system controller syscon node
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunRequired properties for pin configuration sub-nodes:
16*4882a593Smuzhiyun - pins: List of pins to which the configuration applies.
17*4882a593Smuzhiyun
18*4882a593SmuzhiyunOptional properties for pin configuration sub-nodes:
19*4882a593Smuzhiyun----------------------------------------------------
20*4882a593Smuzhiyun - function: Mux function for the specified pins.
21*4882a593Smuzhiyun - bias-pull-up: Enable weak pull-up.
22*4882a593Smuzhiyun
23*4882a593SmuzhiyunExample:
24*4882a593Smuzhiyun
25*4882a593Smuzhiyunpinctrl: pinctrl {
26*4882a593Smuzhiyun	compatible = "oxsemi,ox810se-pinctrl";
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	/* Regmap for sys registers */
29*4882a593Smuzhiyun	oxsemi,sys-ctrl = <&sys>;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	pinctrl_uart2: pinctrl_uart2 {
32*4882a593Smuzhiyun		uart2a {
33*4882a593Smuzhiyun			pins = "gpio31";
34*4882a593Smuzhiyun			function = "fct3";
35*4882a593Smuzhiyun		};
36*4882a593Smuzhiyun		uart2b {
37*4882a593Smuzhiyun			pins = "gpio32";
38*4882a593Smuzhiyun			function = "fct3";
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyunuart2: serial@900000 {
44*4882a593Smuzhiyun	compatible = "ns16550a";
45*4882a593Smuzhiyun	reg = <0x900000 0x100000>;
46*4882a593Smuzhiyun	clocks = <&sysclk>;
47*4882a593Smuzhiyun	interrupts = <29>;
48*4882a593Smuzhiyun	reg-shift = <0>;
49*4882a593Smuzhiyun	fifo-size = <16>;
50*4882a593Smuzhiyun	reg-io-width = <1>;
51*4882a593Smuzhiyun	current-speed = <115200>;
52*4882a593Smuzhiyun	no-loopback-test;
53*4882a593Smuzhiyun	resets = <&reset 22>;
54*4882a593Smuzhiyun	pinctrl-names = "default";
55*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_uart2>;
56*4882a593Smuzhiyun};
57