1*4882a593Smuzhiyun* Microchip PIC32 Pin Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunPlease refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and 4*4882a593Smuzhiyun../interrupt-controller/interrupts.txt for generic information regarding 5*4882a593Smuzhiyunpin controller, GPIO, and interrupt bindings. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunPIC32 'pin configuration node' is a node of a group of pins which can be 8*4882a593Smuzhiyunused for a specific device or function. This node represents configurations of 9*4882a593Smuzhiyunpins, optional function, and optional mux related configuration. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunRequired properties for pin controller node: 12*4882a593Smuzhiyun - compatible: "microchip,pic32mada-pinctrl" 13*4882a593Smuzhiyun - reg: Address range of the pinctrl registers. 14*4882a593Smuzhiyun - clocks: Clock specifier (see clock bindings for details) 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunRequired properties for pin configuration sub-nodes: 17*4882a593Smuzhiyun - pins: List of pins to which the configuration applies. 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunOptional properties for pin configuration sub-nodes: 20*4882a593Smuzhiyun---------------------------------------------------- 21*4882a593Smuzhiyun - function: Mux function for the specified pins. 22*4882a593Smuzhiyun - bias-pull-up: Enable weak pull-up. 23*4882a593Smuzhiyun - bias-pull-down: Enable weak pull-down. 24*4882a593Smuzhiyun - input-enable: Set the pin as an input. 25*4882a593Smuzhiyun - output-low: Set the pin as an output level low. 26*4882a593Smuzhiyun - output-high: Set the pin as an output level high. 27*4882a593Smuzhiyun - microchip,digital: Enable digital I/O. 28*4882a593Smuzhiyun - microchip,analog: Enable analog I/O. 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunExample: 31*4882a593Smuzhiyun 32*4882a593Smuzhiyunpic32_pinctrl: pinctrl@1f801400{ 33*4882a593Smuzhiyun #address-cells = <1>; 34*4882a593Smuzhiyun #size-cells = <1>; 35*4882a593Smuzhiyun compatible = "microchip,pic32mzda-pinctrl"; 36*4882a593Smuzhiyun reg = <0x1f801400 0x400>; 37*4882a593Smuzhiyun clocks = <&rootclk PB1CLK>; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun pinctrl_uart2: pinctrl_uart2 { 40*4882a593Smuzhiyun uart2-tx { 41*4882a593Smuzhiyun pins = "G9"; 42*4882a593Smuzhiyun function = "U2TX"; 43*4882a593Smuzhiyun microchip,digital; 44*4882a593Smuzhiyun output-low; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun uart2-rx { 47*4882a593Smuzhiyun pins = "B0"; 48*4882a593Smuzhiyun function = "U2RX"; 49*4882a593Smuzhiyun microchip,digital; 50*4882a593Smuzhiyun input-enable; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun}; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyunuart2: serial@1f822200 { 56*4882a593Smuzhiyun compatible = "microchip,pic32mzda-uart"; 57*4882a593Smuzhiyun reg = <0x1f822200 0x50>; 58*4882a593Smuzhiyun pinctrl-names = "default"; 59*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart2>; 60*4882a593Smuzhiyun}; 61