xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun== Amlogic Meson pinmux controller ==
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties for the root node:
4*4882a593Smuzhiyun - compatible: one of "amlogic,meson8-cbus-pinctrl"
5*4882a593Smuzhiyun		      "amlogic,meson8b-cbus-pinctrl"
6*4882a593Smuzhiyun		      "amlogic,meson8m2-cbus-pinctrl"
7*4882a593Smuzhiyun		      "amlogic,meson8-aobus-pinctrl"
8*4882a593Smuzhiyun		      "amlogic,meson8b-aobus-pinctrl"
9*4882a593Smuzhiyun		      "amlogic,meson8m2-aobus-pinctrl"
10*4882a593Smuzhiyun		      "amlogic,meson-gxbb-periphs-pinctrl"
11*4882a593Smuzhiyun		      "amlogic,meson-gxbb-aobus-pinctrl"
12*4882a593Smuzhiyun		      "amlogic,meson-gxl-periphs-pinctrl"
13*4882a593Smuzhiyun		      "amlogic,meson-gxl-aobus-pinctrl"
14*4882a593Smuzhiyun		      "amlogic,meson-axg-periphs-pinctrl"
15*4882a593Smuzhiyun		      "amlogic,meson-axg-aobus-pinctrl"
16*4882a593Smuzhiyun		      "amlogic,meson-g12a-periphs-pinctrl"
17*4882a593Smuzhiyun		      "amlogic,meson-g12a-aobus-pinctrl"
18*4882a593Smuzhiyun		      "amlogic,meson-a1-periphs-pinctrl"
19*4882a593Smuzhiyun - reg: address and size of registers controlling irq functionality
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun=== GPIO sub-nodes ===
22*4882a593Smuzhiyun
23*4882a593SmuzhiyunThe GPIO bank for the controller is represented as a sub-node and it acts as a
24*4882a593SmuzhiyunGPIO controller.
25*4882a593Smuzhiyun
26*4882a593SmuzhiyunRequired properties for sub-nodes are:
27*4882a593Smuzhiyun - reg: should contain a list of address and size, one tuple for each entry
28*4882a593Smuzhiyun   in reg-names.
29*4882a593Smuzhiyun - reg-names: an array of strings describing the "reg" entries.
30*4882a593Smuzhiyun   Must contain "mux" and "gpio".
31*4882a593Smuzhiyun   May contain "pull", "pull-enable" and "ds" when appropriate.
32*4882a593Smuzhiyun - gpio-controller: identifies the node as a gpio controller
33*4882a593Smuzhiyun - #gpio-cells: must be 2
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun=== Other sub-nodes ===
36*4882a593Smuzhiyun
37*4882a593SmuzhiyunChild nodes without the "gpio-controller" represent some desired
38*4882a593Smuzhiyunconfiguration for a pin or a group. Those nodes can be pinmux nodes or
39*4882a593Smuzhiyunconfiguration nodes.
40*4882a593Smuzhiyun
41*4882a593SmuzhiyunRequired properties for pinmux nodes are:
42*4882a593Smuzhiyun - groups: a list of pinmux groups. The list of all available groups
43*4882a593Smuzhiyun   depends on the SoC and can be found in driver sources.
44*4882a593Smuzhiyun - function: the name of a function to activate for the specified set
45*4882a593Smuzhiyun   of groups. The list of all available functions depends on the SoC
46*4882a593Smuzhiyun   and can be found in driver sources.
47*4882a593Smuzhiyun
48*4882a593SmuzhiyunRequired properties for configuration nodes:
49*4882a593Smuzhiyun - pins: a list of pin names
50*4882a593Smuzhiyun
51*4882a593SmuzhiyunConfiguration nodes support the following generic properties, as
52*4882a593Smuzhiyundescribed in file pinctrl-bindings.txt:
53*4882a593Smuzhiyun - "bias-disable"
54*4882a593Smuzhiyun - "bias-pull-up"
55*4882a593Smuzhiyun - "bias-pull-down"
56*4882a593Smuzhiyun - "output-enable"
57*4882a593Smuzhiyun - "output-disable"
58*4882a593Smuzhiyun - "output-low"
59*4882a593Smuzhiyun - "output-high"
60*4882a593Smuzhiyun
61*4882a593SmuzhiyunOptional properties :
62*4882a593Smuzhiyun - drive-strength-microamp: Drive strength for the specified pins in uA.
63*4882a593Smuzhiyun			    This property is only valid for G12A and newer.
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun=== Example ===
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun	pinctrl: pinctrl@c1109880 {
68*4882a593Smuzhiyun		compatible = "amlogic,meson8-cbus-pinctrl";
69*4882a593Smuzhiyun		reg = <0xc1109880 0x10>;
70*4882a593Smuzhiyun		#address-cells = <1>;
71*4882a593Smuzhiyun		#size-cells = <1>;
72*4882a593Smuzhiyun		ranges;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		gpio: banks@c11080b0 {
75*4882a593Smuzhiyun			reg = <0xc11080b0 0x28>,
76*4882a593Smuzhiyun			      <0xc11080e8 0x18>,
77*4882a593Smuzhiyun			      <0xc1108120 0x18>,
78*4882a593Smuzhiyun			      <0xc1108030 0x30>;
79*4882a593Smuzhiyun			reg-names = "mux", "pull", "pull-enable", "gpio";
80*4882a593Smuzhiyun			gpio-controller;
81*4882a593Smuzhiyun			#gpio-cells = <2>;
82*4882a593Smuzhiyun               };
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		nand {
85*4882a593Smuzhiyun			mux {
86*4882a593Smuzhiyun				groups = "nand_io", "nand_io_ce0", "nand_io_ce1",
87*4882a593Smuzhiyun					 "nand_io_rb0", "nand_ale", "nand_cle",
88*4882a593Smuzhiyun					 "nand_wen_clk", "nand_ren_clk", "nand_dqs",
89*4882a593Smuzhiyun					 "nand_ce2", "nand_ce3";
90*4882a593Smuzhiyun				function = "nand";
91*4882a593Smuzhiyun			};
92*4882a593Smuzhiyun		};
93*4882a593Smuzhiyun	};
94