1*4882a593SmuzhiyunLantiq FALCON pinmux controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: "lantiq,pinctrl-falcon" 5*4882a593Smuzhiyun- reg: Should contain the physical address and length of the gpio/pinmux 6*4882a593Smuzhiyun register range 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunPlease refer to pinctrl-bindings.txt in this directory for details of the 9*4882a593Smuzhiyuncommon pinctrl bindings used by client devices, including the meaning of the 10*4882a593Smuzhiyunphrase "pin configuration node". 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunLantiq's pin configuration nodes act as a container for an arbitrary number of 13*4882a593Smuzhiyunsubnodes. Each of these subnodes represents some desired configuration for a 14*4882a593Smuzhiyunpin, a group, or a list of pins or groups. This configuration can include the 15*4882a593Smuzhiyunmux function to select on those group(s), and two pin configuration parameters: 16*4882a593Smuzhiyunpull-up and open-drain 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunThe name of each subnode is not important as long as it is unique; all subnodes 19*4882a593Smuzhiyunshould be enumerated and processed purely based on their content. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunEach subnode only affects those parameters that are explicitly listed. In 22*4882a593Smuzhiyunother words, a subnode that lists a mux function but no pin configuration 23*4882a593Smuzhiyunparameters implies no information about any pin configuration parameters. 24*4882a593SmuzhiyunSimilarly, a pin subnode that describes a pullup parameter implies no 25*4882a593Smuzhiyuninformation about e.g. the mux function. 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunWe support 2 types of nodes. 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunDefinition of mux function groups: 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunRequired subnode-properties: 32*4882a593Smuzhiyun- lantiq,groups : An array of strings. Each string contains the name of a group. 33*4882a593Smuzhiyun Valid values for these names are listed below. 34*4882a593Smuzhiyun- lantiq,function: A string containing the name of the function to mux to the 35*4882a593Smuzhiyun group. Valid values for function names are listed below. 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunValid values for group and function names: 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun mux groups: 40*4882a593Smuzhiyun por, ntr, ntr8k, hrst, mdio, bootled, asc0, spi, spi cs0, spi cs1, i2c, 41*4882a593Smuzhiyun jtag, slic, pcm, asc1 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun functions: 44*4882a593Smuzhiyun rst, ntr, mdio, led, asc, spi, i2c, jtag, slic, pcm 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunDefinition of pin configurations: 48*4882a593Smuzhiyun 49*4882a593SmuzhiyunRequired subnode-properties: 50*4882a593Smuzhiyun- lantiq,pins : An array of strings. Each string contains the name of a pin. 51*4882a593Smuzhiyun Valid values for these names are listed below. 52*4882a593Smuzhiyun 53*4882a593SmuzhiyunOptional subnode-properties: 54*4882a593Smuzhiyun- lantiq,pull: Integer, representing the pull-down/up to apply to the pin. 55*4882a593Smuzhiyun 0: none, 1: down 56*4882a593Smuzhiyun- lantiq,drive-current: Boolean, enables drive-current 57*4882a593Smuzhiyun- lantiq,slew-rate: Boolean, enables slew-rate 58*4882a593Smuzhiyun 59*4882a593SmuzhiyunExample: 60*4882a593Smuzhiyun pinmux0 { 61*4882a593Smuzhiyun compatible = "lantiq,pinctrl-falcon"; 62*4882a593Smuzhiyun pinctrl-names = "default"; 63*4882a593Smuzhiyun pinctrl-0 = <&state_default>; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun state_default: pinmux { 66*4882a593Smuzhiyun asc0 { 67*4882a593Smuzhiyun lantiq,groups = "asc0"; 68*4882a593Smuzhiyun lantiq,function = "asc"; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun ntr { 71*4882a593Smuzhiyun lantiq,groups = "ntr8k"; 72*4882a593Smuzhiyun lantiq,function = "ntr"; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun i2c { 75*4882a593Smuzhiyun lantiq,groups = "i2c"; 76*4882a593Smuzhiyun lantiq,function = "i2c"; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun hrst { 79*4882a593Smuzhiyun lantiq,groups = "hrst"; 80*4882a593Smuzhiyun lantiq,function = "rst"; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun }; 84